mirror of
https://github.com/ultravideo/uvg266.git
synced 2024-11-24 02:24:07 +00:00
Update PTL, SPS ext and SPS flags to match VTM 4rc1
This commit is contained in:
Marko Viitanen
parent
465bc2cfee
commit
1165219842
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@ -79,8 +79,7 @@ static void encoder_state_write_bitstream_PTL(bitstream_t *stream,
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WRITE_U(stream, 0, 16, "XXX_reserved_zero_43bits[16..31]");
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WRITE_U(stream, 0, 11, "XXX_reserved_zero_43bits[32..42]");
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// TODO: figure out what this is
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WRITE_U(stream, 0, 1, "general_inbld_flag");
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WRITE_U(stream, 0, 1, "reserved_zero_bit");
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// end Profile Tier
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@ -327,28 +326,27 @@ static void encoder_state_write_bitstream_SPS_extension(bitstream_t *stream,
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WRITE_U(stream, 0, 1, "cabac_bypass_alignment_enabled_flag");
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// Next extension
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WRITE_U(stream, 1, 1, "qtbt_flag");
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//WRITE_U(stream, 1, 1, "qtbt_flag");
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WRITE_U(stream, 0, 1, "large_ctu_flag"); // ToDo: add VVC large block support
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WRITE_U(stream, 0, 1, "subpu_tmvp_flag");
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WRITE_U(stream, 0, 1, "imv_enable_flag");
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//WRITE_U(stream, 0, 1, "high_precision_motion_vectors");
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WRITE_U(stream, 0, 1, "disable_motion_compression_flag");
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WRITE_U(stream, 0, 1, "lm_chroma_enabled_flag");
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WRITE_U(stream, 0, 1, "emt_intra_enabled_flag");
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WRITE_U(stream, 0, 1, "emt_inter_enabled_flag");
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WRITE_U(stream, 0, 1, "mts_enabled_flag");
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// IF MTS
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//WRITE_U(stream, 0, 1, "mts_intra_enabled_flag");
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//WRITE_U(stream, 0, 1, "mts_inter_enabled_flag");
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// endif
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WRITE_U(stream, 0, 1, "affine_flag");
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WRITE_U(stream, 0, 1, "gbi_flag");
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WRITE_U(stream, 0, 5, "reserved_flag_5bits");
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WRITE_U(stream, 0, 1, "mtt_enabled_flag");
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WRITE_U(stream, 0, 1, "next_dqp_enabled_flag");
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WRITE_U(stream, 0, 1, "mhintra_flag");
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WRITE_U(stream, 0, 1, "triangle_flag");
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//WRITE_U(stream, 0, 1, "next_dqp_enabled_flag");
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// QTBT
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WRITE_U(stream, 0, 1, "qtbt_dual_intra_tree");
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WRITE_UE(stream, 4, "log2_CTU_size_minus2"); // Max size 2^6 = 64x64
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WRITE_UE(stream, 1, "log2_minQT_ISlice_minus2");
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WRITE_UE(stream, 1, "log2_minQT_PBSlice_minus2");
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WRITE_UE(stream, 0, "max_bt_depth");
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WRITE_UE(stream, 0, "max_bt_depth_i_slice");
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//} else {
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// WRITE_U(stream, 0, 1, "sps_extension_present_flag");
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@ -364,8 +362,26 @@ static void encoder_state_write_bitstream_seq_parameter_set(bitstream_t* stream,
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printf("=========== Sequence Parameter Set ID: 0 ===========\n");
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#endif
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// TODO: profile IDC and level IDC should be defined later on
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//WRITE_U(stream, 0, 4, "sps_video_parameter_set_id");
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WRITE_U(stream, 0, 1, "intra_only_constraint_flag");
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WRITE_U(stream, 0, 4, "max_bitdepth_constraint_idc");
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WRITE_U(stream, 0, 2, "max_chroma_format_constraint_idc");
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WRITE_U(stream, 0, 1, "frame_only_constraint_flag");
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WRITE_U(stream, 0, 1, "no_qtbtt_dual_tree_intra_constraint_flag");
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WRITE_U(stream, 0, 1, "no_cclm_constraint_flag");
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WRITE_U(stream, 0, 1, "no_sao_constraint_flag");
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WRITE_U(stream, 0, 1, "no_alf_constraint_flag");
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WRITE_U(stream, 0, 1, "no_pcm_constraint_flag");
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WRITE_U(stream, 0, 1, "no_temporal_mvp_constraint_flag");
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WRITE_U(stream, 0, 1, "no_sbtmvp_constraint_flag");
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WRITE_U(stream, 0, 1, "no_amvr_constraint_flag");
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WRITE_U(stream, 0, 1, "no_affine_motion_constraint_flag");
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WRITE_U(stream, 0, 1, "no_mts_constraint_flag");
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WRITE_U(stream, 0, 1, "no_ladf_constraint_flag");
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WRITE_U(stream, 0, 1, "no_dep_quant_constraint_flag");
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WRITE_U(stream, 0, 1, "no_sign_data_hiding_constraint_flag");
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WRITE_U(stream, 0, 1, "ibc_flag");
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WRITE_U(stream, 1, 3, "sps_max_sub_layers_minus1");
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WRITE_U(stream, 0, 1, "sps_temporal_id_nesting_flag");
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@ -381,26 +397,23 @@ static void encoder_state_write_bitstream_seq_parameter_set(bitstream_t* stream,
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WRITE_UE(stream, encoder->in.width, "pic_width_in_luma_samples");
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WRITE_UE(stream, encoder->in.height, "pic_height_in_luma_samples");
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if (encoder->in.width != encoder->in.real_width || encoder->in.height != encoder->in.real_height) {
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bool use_conformance_window = encoder->in.width != encoder->in.real_width || encoder->in.height != encoder->in.real_height;
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WRITE_U(stream, use_conformance_window, 1, "conformance_window_flag");
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if (use_conformance_window) {
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// The standard does not seem to allow setting conf_win values such that
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// the number of luma samples is not a multiple of 2. Options are to either
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// hide one line or show an extra line of non-video. Neither seems like a
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// very good option, so let's not even try.
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assert(!(encoder->in.width % 2));
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WRITE_U(stream, 1, 1, "conformance_window_flag");
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WRITE_UE(stream, 0, "conf_win_left_offset");
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WRITE_UE(stream, (encoder->in.width - encoder->in.real_width) >> 1,
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"conf_win_right_offset");
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WRITE_UE(stream, 0, "conf_win_top_offset");
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WRITE_UE(stream, (encoder->in.height - encoder->in.real_height) >> 1,
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"conf_win_bottom_offset");
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} else {
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WRITE_U(stream, 0, 1, "conformance_window_flag");
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}
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//IF window flag
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//END IF
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WRITE_UE(stream, encoder->bitdepth-8, "bit_depth_luma_minus8");
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WRITE_UE(stream, encoder->bitdepth-8, "bit_depth_chroma_minus8");
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WRITE_UE(stream, 1, "log2_max_pic_order_cnt_lsb_minus4");
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@ -417,8 +430,22 @@ static void encoder_state_write_bitstream_seq_parameter_set(bitstream_t* stream,
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WRITE_UE(stream, 0, "sps_max_latency_increase_plus1");
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//end for
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WRITE_UE(stream, MIN_SIZE-3, "log2_min_luma_coding_block_size_minus3");
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WRITE_UE(stream, MAX_DEPTH, "log2_diff_max_min_luma_coding_block_size");
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// QTBT
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WRITE_U(stream, 0, 1, "qtbt_dual_intra_tree");
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WRITE_UE(stream, 4, "log2_CTU_size_minus2"); // Max size 2^6 = 64x64
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WRITE_UE(stream, MIN_SIZE-2, "log2_min_luma_coding_block_size_minus2"); // Min size 2^3 = 8x8
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WRITE_U(stream, 0, 1, "sps_override_partition_constraints_enable_flag");
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WRITE_UE(stream, MAX_DEPTH, "sps_log2_diff_min_qt_min_cb_intra_slice");
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WRITE_UE(stream, MAX_DEPTH, "sps_log2_diff_min_qt_min_cb_inter_slice");
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WRITE_UE(stream, 0, "sps_max_mtt_hierarchy_depth_inter_slices");
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WRITE_UE(stream, 0, "sps_max_mtt_hierarchy_depth_intra_slices");
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//WRITE_UE(stream, 1, "log2_minQT_ISlice_minus2");
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//WRITE_UE(stream, 1, "log2_minQT_PBSlice_minus2");
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// ToDo: redefine for VVC
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WRITE_UE(stream, 0, "log2_min_luma_transform_block_size_minus2"); // 4x4
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@ -426,19 +453,12 @@ static void encoder_state_write_bitstream_seq_parameter_set(bitstream_t* stream,
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WRITE_UE(stream, encoder->tr_depth_inter, "max_transform_hierarchy_depth_inter");
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WRITE_UE(stream, encoder->cfg.tr_depth_intra, "max_transform_hierarchy_depth_intra");
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WRITE_U(stream, encoder->cfg.sao_type ? 1 : 0, 1, "sps_sao_enabled_flag");
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WRITE_U(stream, 0, 1, "sps_alf_enable_flag");
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/*
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// scaling list
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WRITE_U(stream, encoder->scaling_list.enable, 1, "scaling_list_enable_flag");
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if (encoder->scaling_list.enable) {
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WRITE_U(stream, 1, 1, "sps_scaling_list_data_present_flag");
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encoder_state_write_bitstream_scaling_list(stream, state);
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}
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*/
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WRITE_U(stream, (encoder->cfg.amp_enable ? 1 : 0), 1, "amp_enabled_flag");
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WRITE_U(stream, encoder->cfg.sao_type ? 1 : 0, 1,
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"sample_adaptive_offset_enabled_flag");
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WRITE_U(stream, ENABLE_PCM, 1, "pcm_enabled_flag");
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#if ENABLE_PCM == 1
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WRITE_U(stream, 7, 4, "pcm_sample_bit_depth_luma_minus1");
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@ -448,6 +468,27 @@ static void encoder_state_write_bitstream_seq_parameter_set(bitstream_t* stream,
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WRITE_U(stream, 1, 1, "pcm_loop_filter_disable_flag");
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#endif
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WRITE_U(stream, 0, 1, "sps_ref_wraparound_enabled_flag");
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WRITE_U(stream, state->encoder_control->cfg.tmvp_enable, 1,
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"sps_temporal_mvp_enable_flag");
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if (state->encoder_control->cfg.tmvp_enable) {
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WRITE_U(stream, 0, 1, "sps_sbtmvp_enabled_flag");
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}
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WRITE_U(stream, 0, 1, "sps_bdof_enabled_flag");
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WRITE_U(stream, 0, 1, "sps_fracmmvd_disabled_flag");
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WRITE_U(stream, 0, 1, "sps_affine_amvr_enabled_flag");
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WRITE_U(stream, 0, 1, "dmvr_enable_flag");
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/*
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// scaling list
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WRITE_U(stream, encoder->scaling_list.enable, 1, "scaling_list_enable_flag");
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if (encoder->scaling_list.enable) {
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WRITE_U(stream, 1, 1, "sps_scaling_list_data_present_flag");
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encoder_state_write_bitstream_scaling_list(stream, state);
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}
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*/
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WRITE_U(stream, 0, 1, "sbt_enable_flag");
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WRITE_UE(stream, 0, "num_short_term_ref_pic_sets");
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//IF num short term ref pic sets
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@ -458,8 +499,7 @@ static void encoder_state_write_bitstream_seq_parameter_set(bitstream_t* stream,
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//IF long_term_ref_pics_present
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//ENDIF
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WRITE_U(stream, state->encoder_control->cfg.tmvp_enable, 1,
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"sps_temporal_mvp_enable_flag");
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//WRITE_U(stream, 0, 1, "sps_strong_intra_smoothing_enable_flag");
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WRITE_U(stream, 1, 1, "vui_parameters_present_flag");
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@ -491,12 +531,10 @@ static void encoder_state_write_bitstream_pic_parameter_set(bitstream_t* stream,
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WRITE_U(stream, 0, 1, "constrained_intra_pred_flag");
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WRITE_U(stream, encoder->cfg.trskip_enable, 1, "transform_skip_enabled_flag");
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WRITE_U(stream, encoder->max_qp_delta_depth >= 0 ? 1:0, 1, "cu_qp_delta_enabled_flag");
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if (encoder->max_qp_delta_depth >= 0) {
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// Use separate QP for each LCU when rate control is enabled.
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WRITE_U(stream, 1, 1, "cu_qp_delta_enabled_flag");
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WRITE_UE(stream, encoder->max_qp_delta_depth, "diff_cu_qp_delta_depth");
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} else {
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WRITE_U(stream, 0, 1, "cu_qp_delta_enabled_flag");
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}
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//TODO: add QP offsets
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@ -504,10 +542,10 @@ static void encoder_state_write_bitstream_pic_parameter_set(bitstream_t* stream,
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WRITE_SE(stream, 0, "pps_cr_qp_offset");
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WRITE_U(stream, 0, 1, "pps_slice_chroma_qp_offsets_present_flag");
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WRITE_U(stream, 0, 1, "weighted_pred_flag");
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WRITE_U(stream, 0, 1, "weighted_bipred_idc");
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WRITE_U(stream, 0, 1, "weighted_bipred_flag");
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//WRITE_U(stream, 0, 1, "dependent_slices_enabled_flag");
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WRITE_U(stream, encoder->cfg.lossless, 1, "transquant_bypass_enable_flag");
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WRITE_U(stream, encoder->cfg.lossless, 1, "transquant_bypass_enabled_flag");
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/*
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WRITE_U(stream, encoder->tiles_enable, 1, "tiles_enabled_flag");
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@ -533,18 +571,18 @@ static void encoder_state_write_bitstream_pic_parameter_set(bitstream_t* stream,
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}
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*/
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WRITE_U(stream, 0, 1, "loop_filter_across_slice_flag");
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WRITE_U(stream, 0, 1, "pps_loop_filter_across_slices_enabled_flag");
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WRITE_U(stream, 1, 1, "deblocking_filter_control_present_flag");
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//IF deblocking_filter
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WRITE_U(stream, 0, 1, "deblocking_filter_override_enabled_flag");
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WRITE_U(stream, 0, 1, "deblocking_filter_override_enabled_flag");
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WRITE_U(stream, encoder->cfg.deblock_enable ? 0 : 1, 1,
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"pps_disable_deblocking_filter_flag");
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//IF !disabled
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if (encoder->cfg.deblock_enable) {
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WRITE_SE(stream, encoder->cfg.deblock_beta, "beta_offset_div2");
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WRITE_SE(stream, encoder->cfg.deblock_tc, "tc_offset_div2");
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if (encoder->cfg.deblock_enable) {
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WRITE_SE(stream, encoder->cfg.deblock_beta, "beta_offset_div2");
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WRITE_SE(stream, encoder->cfg.deblock_tc, "tc_offset_div2");
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}
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//ENDIF
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