mirror of
https://github.com/ultravideo/uvg266.git
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Merge commit '792a5a5dd1946a327f22b2daba05c6645dfa8037'
This commit is contained in:
commit
6a72f87028
23
src/Makefile
23
src/Makefile
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@ -9,15 +9,20 @@ DFLAGS = -O2 -g -Werror -march=native
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# ARCH related flags
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# ARCH related flags
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ifeq ($(ARCH), x86_64)
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ifeq ($(ARCH), x86_64)
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ASMFLAGS += -DARCH_X86_64=1
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TARGET_CPU_BITS := 64
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DFLAGS += -m64
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TARGET_CPU_ARCH := x86
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LDFLAGS += -m64
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else ifeq ($(ARCH), ppc64)
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TARGET_CPU_BITS := 64
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TARGET_CPU_ARCH := ppc
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else
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else
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ASMFLAGS += -DARCH_X86_64=0
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#safe (?) defaults
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DFLAGS += -m32
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TARGET_CPU_BITS := 32
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LDFLAGS += -m32
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TARGET_CPU_ARCH := x86
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endif
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endif
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DFLAGS += -m$(TARGET_CPU_BITS)
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LDFLAGS += -m$(TARGET_CPU_BITS)
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# Windows (cygwin/mingw) specific flags
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# Windows (cygwin/mingw) specific flags
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ifneq ( ,$(findstring Windows, $(OS)))
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ifneq ( ,$(findstring Windows, $(OS)))
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ifeq ($(ARCH), x86_64)
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ifeq ($(ARCH), x86_64)
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@ -48,8 +53,6 @@ CC = gcc
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CCFLAGS = $(DFLAGS) -I. -Wall -Wtype-limits
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CCFLAGS = $(DFLAGS) -I. -Wall -Wtype-limits
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LDFLAGS += -lm
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LDFLAGS += -lm
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LD = gcc -pthread -lrt
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LD = gcc -pthread -lrt
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YASM = yasm
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ASMOBJS = cpu.o
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OBJS = interface_main.o encmain.o bitstream.o cabac.o config.o context.o encoder.o filter.o inter.o intra.o nal.o picture.o rdo.o sao.o scalinglist.o search.o strategyselector.o tables.o threadqueue.o transform.o
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OBJS = interface_main.o encmain.o bitstream.o cabac.o config.o context.o encoder.o filter.o inter.o intra.o nal.o picture.o rdo.o sao.o scalinglist.o search.o strategyselector.o tables.o threadqueue.o transform.o
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PROG = ./kvazaar
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PROG = ./kvazaar
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PROGS = $(PROG)
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PROGS = $(PROG)
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@ -62,9 +65,6 @@ all: $(PROGS)
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$(PROG): $(OBJS) $(ASMOBJS)
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$(PROG): $(OBJS) $(ASMOBJS)
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$(LD) $^ $(LDFLAGS) -o $@
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$(LD) $^ $(LDFLAGS) -o $@
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cpu.o: x86/cpu.asm
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$(YASM) $(ASMFLAGS) x86/cpu.asm -o cpu.o
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%.o: %.c Makefile
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%.o: %.c Makefile
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$(CC) $(CCFLAGS) -c $< -o $@
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$(CC) $(CCFLAGS) -c $< -o $@
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@ -73,6 +73,7 @@ cpu.o: x86/cpu.asm
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clean:
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clean:
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echo $(ARCH)
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rm -f $(OBJS) $(PROGS) $(ASMOBJS) $(DEPS)
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rm -f $(OBJS) $(PROGS) $(ASMOBJS) $(DEPS)
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-include $(DEPS)
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-include $(DEPS)
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@ -135,7 +135,7 @@ typedef int16_t coefficient;
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#define SIZE_NxN 3
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#define SIZE_NxN 3
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#define SIZE_NONE 15
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#define SIZE_NONE 15
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#define MAX_TILES_PER_DIM 16
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#define MAX_TILES_PER_DIM 48
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#define MAX_SLICES 16
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#define MAX_SLICES 16
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/* Inlining functions */
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/* Inlining functions */
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@ -718,7 +718,6 @@ void intra_recon_lcu_chroma(encoder_state * const encoder_state, int x, int y, i
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cu_info *cur_cu = &lcu->cu[LCU_CU_OFFSET + (lcu_px.x>>3) + (lcu_px.y>>3)*LCU_T_CU_WIDTH];
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cu_info *cur_cu = &lcu->cu[LCU_CU_OFFSET + (lcu_px.x>>3) + (lcu_px.y>>3)*LCU_T_CU_WIDTH];
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const int8_t width = LCU_WIDTH >> depth;
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const int8_t width = LCU_WIDTH >> depth;
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const int8_t width_c = (depth == MAX_PU_DEPTH ? width : width / 2);
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const int8_t width_c = (depth == MAX_PU_DEPTH ? width : width / 2);
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const int pu_index = PU_INDEX(x >> 2, y >> 2);
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if (depth == 0 || cur_cu->tr_depth > depth) {
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if (depth == 0 || cur_cu->tr_depth > depth) {
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int offset = width / 2;
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int offset = width / 2;
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@ -155,7 +155,28 @@ static void* strategyselector_choose_for(const strategy_list * const strategies,
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}
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}
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#if COMPILE_INTEL
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#if COMPILE_INTEL
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#include "x86/cpu.h"
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#if defined(__GNUC__)
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#include <cpuid.h>
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#else
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#include <intrin.h>
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//Adapter from __cpuid (VS) to __get_cpuid (GNU C).
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__inline int __get_cpuid(unsigned int __level, unsigned int *__eax, unsigned int *__ebx, unsigned int *__ecx, unsigned int *__edx) {
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int CPUInfo[4] = {*__eax, *__ebx, *__ecx, *__edx};
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__cpuid(CPUInfo, 0);
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// check if the CPU supports the cpuid instruction.
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if (CPUInfo[0] != 0) {
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__cpuid(CPUInfo, __level);
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*__eax = CPUInfo[0];
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*__ebx = CPUInfo[1];
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*__ecx = CPUInfo[2];
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*__edx = CPUInfo[3];
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return 1;
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}
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return 0;
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}
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#endif //defined(__GNUC__)
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#endif
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#endif
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static void set_hardware_flags() {
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static void set_hardware_flags() {
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@ -167,12 +188,12 @@ static void set_hardware_flags() {
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#if COMPILE_INTEL
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#if COMPILE_INTEL
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{
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{
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int ecx = 0,edx =0;
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unsigned int eax = 0, ebx = 0, ecx = 0, edx =0;
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/* CPU feature bits */
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/* CPU feature bits */
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enum { BIT_SSE3 = 0,BIT_SSSE3 = 9, BIT_SSE41 = 19, BIT_SSE42 = 20, BIT_MMX = 24, BIT_SSE = 25, BIT_SSE2 = 26, BIT_AVX = 28};
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enum { BIT_SSE3 = 0,BIT_SSSE3 = 9, BIT_SSE41 = 19, BIT_SSE42 = 20, BIT_MMX = 24, BIT_SSE = 25, BIT_SSE2 = 26, BIT_AVX = 28};
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// Dig CPU features with cpuid
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// Dig CPU features with cpuid
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kvz_cpu_cpuid(&ecx,&edx);
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__get_cpuid(1, &eax, &ebx, &ecx, &edx);
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// EDX
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// EDX
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if (edx & (1<<BIT_MMX)) g_hardware_flags.intel_flags.mmx = 1;
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if (edx & (1<<BIT_MMX)) g_hardware_flags.intel_flags.mmx = 1;
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@ -106,7 +106,7 @@ class LogParser:
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else:
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else:
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return float(value)
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return float(value)
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def __init__(self):
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def __init__(self, filename):
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re_thread = re.compile(r'^\t([0-9]+)\t-\t([0-9\.]+)\t(\+?)([0-9\.]+)\t-\tthread$')
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re_thread = re.compile(r'^\t([0-9]+)\t-\t([0-9\.]+)\t(\+?)([0-9\.]+)\t-\tthread$')
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re_job = re.compile(r'^([^\t]+)\t([0-9]+)\t([0-9\.]+)\t(\+?)([0-9\.]+)\t(\+?)([0-9\.]+)\t(\+?)([0-9\.]+)\t(.*)$')
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re_job = re.compile(r'^([^\t]+)\t([0-9]+)\t([0-9\.]+)\t(\+?)([0-9\.]+)\t(\+?)([0-9\.]+)\t(\+?)([0-9\.]+)\t(.*)$')
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re_dep = re.compile(r'^(.+)->(.+)$')
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re_dep = re.compile(r'^(.+)->(.+)$')
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@ -118,7 +118,7 @@ class LogParser:
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objects = []
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objects = []
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threads = {}
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threads = {}
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for line in open('threadqueue.log','r').readlines():
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for line in open(filename,'r').readlines():
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m = re_thread.match(line)
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m = re_thread.match(line)
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if m:
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if m:
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g = m.groups()
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g = m.groups()
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@ -281,6 +281,10 @@ class LogParser:
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if __name__ == '__main__':
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if __name__ == '__main__':
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l = LogParser()
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import sys
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if len(sys.argv) > 1:
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l = LogParser(sys.argv[1])
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else:
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l = LogParser('threadqueue.log')
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l.plot_picture_wise_wpp()
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l.plot_picture_wise_wpp()
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#l.plot_threads()
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#l.plot_threads()
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