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https://github.com/ultravideo/uvg266.git
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[avx2] update_states_avx2 working
This commit is contained in:
parent
58a66c0654
commit
8f4c3cecbf
157
src/dep_quant.c
157
src/dep_quant.c
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@ -158,11 +158,14 @@ typedef struct
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int8_t m_goRiceZero[12];
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int8_t m_stateId[12];
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uint32_t m_sigFracBitsArray[12][12][2];
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int32_t *m_gtxFracBitsArray[21];
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int32_t m_gtxFracBitsArray[21][6];
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common_context* m_commonCtx;
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unsigned effWidth;
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unsigned effHeight;
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bool all_gte_four;
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bool all_lt_four;
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} all_depquant_states;
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typedef struct
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@ -577,14 +580,8 @@ static void check_rd_costs_avx2(const all_depquant_states* const state, const en
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rd_cost_a = _mm256_add_epi64(rd_cost_a, pq_a_delta_dist);
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rd_cost_b = _mm256_add_epi64(rd_cost_b, pq_b_delta_dist);
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bool all_over_or_four = true;
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bool all_under_four = true;
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for (int i = 0; i < 4; i++) {
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all_over_or_four &= state->m_remRegBins[start + i] >= 4;
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all_under_four &= state->m_remRegBins[start + i] < 4;
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}
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if (all_over_or_four) {
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if (state->all_gte_four) {
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if (pqDataA->absLevel[0] < 4 && pqDataA->absLevel[3] < 4) {
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__m128i offsets = _mm_set_epi32(18 + pqDataA->absLevel[3], 12 + pqDataA->absLevel[3], 6 + pqDataA->absLevel[0], 0 + pqDataA->absLevel[0]);
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__m128i coeff_frac_bits = _mm_i32gather_epi32(&state->m_coeffFracBits[start][0], offsets, 4);
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@ -737,7 +734,7 @@ static void check_rd_costs_avx2(const all_depquant_states* const state, const en
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_mm256_storeu_epi64(temp_rd_cost_a, rd_cost_a);
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_mm256_storeu_epi64(temp_rd_cost_b, rd_cost_b);
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_mm256_storeu_epi64(temp_rd_cost_z, rd_cost_z);
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} else if (all_under_four) {
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} else if (state->all_lt_four) {
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__m128i scale_bits = _mm_set1_epi32(1 << SCALE_BITS);
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__m128i max_rice = _mm_set1_epi32(31);
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__m128i go_rice_zero = _mm_cvtepi8_epi32(_mm_loadu_epi8(&state->m_goRiceZero[start]));
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@ -1274,6 +1271,8 @@ static INLINE void update_states_avx2(
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all_minus_one &= decisions->prevId[i] == -1;
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}
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int state_offset = ctxs->m_curr_state_offset;
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__m256i rd_cost = _mm256_loadu_epi64(decisions->rdCost);
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_mm256_storeu_epi64(&ctxs->m_allStates.m_rdCost[state_offset], rd_cost);
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if (all_above_minus_two) {
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bool rem_reg_all_gte_4 = true;
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@ -1312,7 +1311,7 @@ static INLINE void update_states_avx2(
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memcpy(&state->m_goRicePar[state_offset], &go_rice_par_i, 4);
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__m256i sbb_frac_bits = _mm256_i32gather_epi64(state->m_sbbFracBits, prv_states, 4);
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__m256i sbb_frac_bits = _mm256_i32gather_epi64(state->m_sbbFracBits, prv_states, 8);
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_mm256_storeu_epi64(&state->m_sbbFracBits[state_offset][0], sbb_frac_bits);
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__m128i rem_reg_bins = _mm_i32gather_epi32(state->m_remRegBins, prv_states, 4);
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@ -1321,7 +1320,7 @@ static INLINE void update_states_avx2(
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__m128i reg_bins_sub = _mm_set1_epi32(0);
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__m128i abs_level_smaller_than_two = _mm_cmplt_epi32(abs_level, _mm_set1_epi32(2));
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__m128i secondary = _mm_blendv_epi8(abs_level, _mm_set1_epi32(3), abs_level_smaller_than_two);
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__m128i secondary = _mm_blendv_epi8(_mm_set1_epi32(3), abs_level, abs_level_smaller_than_two);
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__m128i rem_reg_bins_smaller_than_four = _mm_cmplt_epi32(rem_reg_bins, _mm_set1_epi32(4));
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reg_bins_sub = _mm_blendv_epi8(secondary, reg_bins_sub, rem_reg_bins_smaller_than_four);
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@ -1336,7 +1335,7 @@ static INLINE void update_states_avx2(
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rem_reg_all_lt4 = (bit_mask == 0xFFFF);
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for (int i = 0; i < 4; ++i) {
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memcpy(state->m_absLevelsAndCtxInit[i], state->m_absLevelsAndCtxInit[prv_states_scalar[i]], 48 * sizeof(uint8_t));
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memcpy(state->m_absLevelsAndCtxInit[state_offset + i], state->m_absLevelsAndCtxInit[prv_states_scalar[i]], 48 * sizeof(uint8_t));
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}
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}
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else if (all_minus_one) {
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@ -1347,8 +1346,8 @@ static INLINE void update_states_avx2(
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__m128i rem_reg_bins = _mm_set1_epi32(a);
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__m128i sub = _mm_blendv_epi8(
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abs_level,
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_mm_set1_epi32(3),
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abs_level,
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_mm_cmplt_epi32(abs_level, _mm_set1_epi32(2))
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);
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rem_reg_bins = _mm_sub_epi32(rem_reg_bins, sub);
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@ -1400,18 +1399,20 @@ static INLINE void update_states_avx2(
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uint8_t* levels = (uint8_t*)state->m_absLevelsAndCtxInit[state_offset + i];
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levels[level_offset] = max_abs_s[i];
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}
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state->all_gte_four = rem_reg_all_gte_4;
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state->all_lt_four = rem_reg_all_lt4;
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if (rem_reg_all_gte_4) {
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const __m128i last_two_bytes = _mm_set1_epi32(0xffff);
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const __m128i last_byte = _mm_set1_epi32(0xff);
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const __m128i first_two_bytes = _mm_set1_epi32(0xffff);
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const __m128i first_byte = _mm_set1_epi32(0xff);
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const __m128i ones = _mm_set1_epi32(1);
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const uint32_t tinit_offset = MIN(level_offset - 1u, 15u) + 8;
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const __m128i levels_start_offsets = _mm_set_epi32(48 * 3, 48 * 2, 48 * 1, 48 * 0);
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const __m128i ctx_start_offsets = _mm_srli_epi32(levels_start_offsets, 1);
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__m128i tinit = _mm_i32gather_epi32(
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state->m_absLevelsAndCtxInit[state_offset],
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_mm_add_epi32(levels_start_offsets, _mm_set1_epi32(tinit_offset)),
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1);
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tinit = _mm_and_epi32(tinit, last_two_bytes);
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_mm_add_epi32(ctx_start_offsets, _mm_set1_epi32(tinit_offset)),
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2);
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tinit = _mm_and_epi32(tinit, first_two_bytes);
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__m128i sum_abs1 = _mm_and_epi32(_mm_srli_epi32(tinit, 3), _mm_set1_epi32(31));
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__m128i sum_num = _mm_and_epi32(tinit, _mm_set1_epi32(7));
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@ -1423,12 +1424,18 @@ static INLINE void update_states_avx2(
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levels,
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_mm_add_epi32(levels_start_offsets, _mm_set1_epi32(next_nb_info_ssb.inPos[4])),
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1);
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t = _mm_and_epi32(t, first_byte);
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__m128i min_arg = _mm_min_epi32(
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_mm_add_epi32(_mm_set1_epi32(4), _mm_and_epi32(t, ones)),
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t
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);
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sum_abs1 = _mm_add_epi32(
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sum_abs1,
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_mm_and_epi32(t, ones));
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min_arg
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);
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sum_num = _mm_add_epi32(
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sum_num,
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_mm_min_epi32(_mm_and_epi32(t, last_byte), ones));
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_mm_min_epi32(_mm_and_epi32(t, first_byte), ones));
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}
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case 4:
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{
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@ -1436,12 +1443,18 @@ static INLINE void update_states_avx2(
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levels,
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_mm_add_epi32(levels_start_offsets, _mm_set1_epi32(next_nb_info_ssb.inPos[3])),
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1);
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t = _mm_and_epi32(t, first_byte);
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__m128i min_arg = _mm_min_epi32(
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_mm_add_epi32(_mm_set1_epi32(4), _mm_and_epi32(t, ones)),
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t
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);
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sum_abs1 = _mm_add_epi32(
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sum_abs1,
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_mm_and_epi32(t, ones));
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min_arg
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);
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sum_num = _mm_add_epi32(
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sum_num,
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_mm_min_epi32(_mm_and_epi32(t, last_byte), ones));
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_mm_min_epi32(_mm_and_epi32(t, first_byte), ones));
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}
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case 3:
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{
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@ -1449,12 +1462,18 @@ static INLINE void update_states_avx2(
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levels,
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_mm_add_epi32(levels_start_offsets, _mm_set1_epi32(next_nb_info_ssb.inPos[2])),
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1);
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t = _mm_and_epi32(t, first_byte);
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__m128i min_arg = _mm_min_epi32(
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_mm_add_epi32(_mm_set1_epi32(4), _mm_and_epi32(t, ones)),
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t
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);
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sum_abs1 = _mm_add_epi32(
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sum_abs1,
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_mm_and_epi32(t, ones));
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min_arg
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);
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sum_num = _mm_add_epi32(
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sum_num,
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_mm_min_epi32(_mm_and_epi32(t, last_byte), ones));
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_mm_min_epi32(_mm_and_epi32(t, first_byte), ones));
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}
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case 2:
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{
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@ -1462,39 +1481,52 @@ static INLINE void update_states_avx2(
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levels,
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_mm_add_epi32(levels_start_offsets, _mm_set1_epi32(next_nb_info_ssb.inPos[1])),
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1);
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t = _mm_and_epi32(t, first_byte);
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__m128i min_arg = _mm_min_epi32(
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_mm_add_epi32(_mm_set1_epi32(4), _mm_and_epi32(t, ones)),
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t
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);
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sum_abs1 = _mm_add_epi32(
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sum_abs1,
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_mm_and_epi32(t, ones));
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min_arg
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);
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sum_num = _mm_add_epi32(
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sum_num,
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_mm_min_epi32(_mm_and_epi32(t, last_byte), ones));
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_mm_min_epi32(_mm_and_epi32(t, first_byte), ones));
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}
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case 1: {
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__m128i t = _mm_i32gather_epi32(
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levels,
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_mm_add_epi32(levels_start_offsets, _mm_set1_epi32(next_nb_info_ssb.inPos[0])),
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1);
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t = _mm_and_epi32(t, first_byte);
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__m128i min_arg = _mm_min_epi32(
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_mm_add_epi32(_mm_set1_epi32(4), _mm_and_epi32(t, ones)),
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t
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);
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sum_abs1 = _mm_add_epi32(
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sum_abs1,
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_mm_and_epi32(t, ones));
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min_arg
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);
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sum_num = _mm_add_epi32(
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sum_num,
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_mm_min_epi32(_mm_and_epi32(t, last_byte), ones));
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_mm_min_epi32(_mm_and_epi32(t, first_byte), ones));
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} break;
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default:
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assert(0);
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}
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__m128i sum_gt1 = _mm_sub_epi32(sum_abs1, sum_num);
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__m128i offsets = _mm_set_epi32(24 * 3, 24 * 2, 24 * 1, 24 * 0);
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__m128i offsets = _mm_set_epi32(12 * 3, 12 * 2, 12 * 1, 12 * 0);
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offsets = _mm_add_epi32(offsets, _mm_set1_epi32(sigCtxOffsetNext));
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__m128i temp = _mm_min_epi32(
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_mm_srli_epi32(_mm_add_epi32(sum_abs1, ones), 1),
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_mm_set1_epi32(3));
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offsets = _mm_add_epi32(offsets, temp);
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__m256i sig_frac_bits = _mm256_i32gather_epi64(state->m_sigFracBitsArray[state_offset][0], offsets, 4);
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__m256i sig_frac_bits = _mm256_i32gather_epi64(state->m_sigFracBitsArray[state_offset][0], offsets, 8);
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_mm256_storeu_epi64(&state->m_sigFracBits[state_offset][0], sig_frac_bits);
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sum_gt1 = _mm_min_epi32(sum_gt1, _mm_set1_epi32(4));
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sum_gt1 = _mm_add_epi32(sum_gt1, _mm_set1_epi32(gtxCtxOffsetNext));
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uint32_t sum_gt1_s[4];
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_mm_storeu_epi32(sum_gt1_s, sum_gt1);
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for (int i = 0; i < 4; ++i) {
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@ -1509,7 +1541,7 @@ static INLINE void update_states_avx2(
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levels,
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_mm_add_epi32(levels_start_offsets, _mm_set1_epi32(next_nb_info_ssb.inPos[4])),
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1);
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t = _mm_and_epi32(t, last_byte);
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t = _mm_and_epi32(t, first_byte);
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sum_abs = _mm_add_epi32(sum_abs, t);
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}
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case 4:
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@ -1518,7 +1550,7 @@ static INLINE void update_states_avx2(
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levels,
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_mm_add_epi32(levels_start_offsets, _mm_set1_epi32(next_nb_info_ssb.inPos[3])),
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1);
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t = _mm_and_epi32(t, last_byte);
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t = _mm_and_epi32(t, first_byte);
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sum_abs = _mm_add_epi32(sum_abs, t);
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}
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case 3:
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@ -1527,7 +1559,7 @@ static INLINE void update_states_avx2(
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levels,
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_mm_add_epi32(levels_start_offsets, _mm_set1_epi32(next_nb_info_ssb.inPos[2])),
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1);
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t = _mm_and_epi32(t, last_byte);
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t = _mm_and_epi32(t, first_byte);
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sum_abs = _mm_add_epi32(sum_abs, t);
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}
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case 2:
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@ -1536,7 +1568,7 @@ static INLINE void update_states_avx2(
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levels,
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_mm_add_epi32(levels_start_offsets, _mm_set1_epi32(next_nb_info_ssb.inPos[1])),
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1);
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t = _mm_and_epi32(t, last_byte);
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t = _mm_and_epi32(t, first_byte);
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sum_abs = _mm_add_epi32(sum_abs, t);
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}
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case 1:
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@ -1545,7 +1577,7 @@ static INLINE void update_states_avx2(
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levels,
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_mm_add_epi32(levels_start_offsets, _mm_set1_epi32(next_nb_info_ssb.inPos[0])),
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1);
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t = _mm_and_epi32(t, last_byte);
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t = _mm_and_epi32(t, first_byte);
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sum_abs = _mm_add_epi32(sum_abs, t);
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} break;
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default:
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@ -1560,7 +1592,10 @@ static INLINE void update_states_avx2(
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_mm_sub_epi32(sum_abs, _mm_set1_epi32(20))),
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_mm_set1_epi32(0));
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__m128i temp = _mm_i32gather_epi32(g_goRiceParsCoeff, sum_all, 4);
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_mm_storeu_epi32(&state->m_goRicePar[state_offset], temp);
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__m128i control = _mm_setr_epi8(0, 4, 8, 12, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1);
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__m128i go_rice_par = _mm_shuffle_epi8(temp, control);
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int go_rice_par_i = _mm_extract_epi32(go_rice_par, 0);
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memcpy(&state->m_goRicePar[state_offset], &go_rice_par_i, 4);
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}
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}
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@ -1571,10 +1606,11 @@ static INLINE void update_states_avx2(
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const __m128i ones = _mm_set1_epi32(1);
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const uint32_t tinit_offset = MIN(level_offset - 1u, 15u) + 8;
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const __m128i levels_start_offsets = _mm_set_epi32(48 * 3, 48 * 2, 48 * 1, 48 * 0);
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const __m128i ctx_start_offsets = _mm_srli_epi32(levels_start_offsets, 1);
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__m128i tinit = _mm_i32gather_epi32(
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state->m_absLevelsAndCtxInit[state_offset],
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_mm_add_epi32(levels_start_offsets, _mm_set1_epi32(tinit_offset)),
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1);
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_mm_add_epi32(ctx_start_offsets, _mm_set1_epi32(tinit_offset)),
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2);
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tinit = _mm_and_epi32(tinit, last_two_bytes);
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__m128i sum_abs = _mm_srli_epi32(tinit, 8);
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switch (numIPos) {
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@ -1624,22 +1660,19 @@ static INLINE void update_states_avx2(
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if (extRiceFlag) {
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assert(0 && "Not implemented for avx2");
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} else {
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__m128i sum_all = _mm_max_epi32(
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_mm_min_epi32(
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_mm_set1_epi32(31),
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_mm_sub_epi32(sum_abs, _mm_set1_epi32(20))),
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_mm_set1_epi32(0));
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__m128i sum_all = _mm_min_epi32(_mm_set1_epi32(31), sum_abs);
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__m128i temp = _mm_i32gather_epi32(g_goRiceParsCoeff, sum_all, 4);
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__m128i control = _mm_setr_epi8(0, 4, 8, 12, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1);
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__m128i go_rice_par = _mm_shuffle_epi8(temp, control);
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int go_rice_par_i = _mm_extract_epi32(go_rice_par, 0);
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memcpy(&state->m_goRicePar[state_offset], &go_rice_par_i, 4);
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__m128i go_rice_zero = _mm_set_epi32(2, 2, 1, 1);
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go_rice_zero = _mm_sll_epi32(go_rice_zero, temp);
|
||||
go_rice_zero = _mm_shuffle_epi8(go_rice_zero, control);
|
||||
int go_rice_zero_i = _mm_extract_epi32(go_rice_par, 0);
|
||||
memcpy(&state->m_goRiceZero[state_offset], &go_rice_zero_i, 4);
|
||||
|
||||
for (int i = 0; i < 4; ++i) {
|
||||
state->m_goRiceZero[state_offset + i] = (i < 2 ? 1 : 2) << state->m_goRicePar[state_offset + i];
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
@ -1729,6 +1762,8 @@ static INLINE void update_states_avx2(
|
|||
}
|
||||
} else {
|
||||
for (int i = 0; i < 4; ++i) {
|
||||
state->all_gte_four = true;
|
||||
state->all_lt_four = true;
|
||||
updateState(
|
||||
ctxs,
|
||||
numIPos,
|
||||
|
@ -1758,7 +1793,7 @@ static INLINE void updateState(
|
|||
int decision_id) {
|
||||
all_depquant_states* state = &ctxs->m_allStates;
|
||||
int state_id = ctxs->m_curr_state_offset + decision_id;
|
||||
state->m_rdCost[state_id] = decisions->rdCost[decision_id];
|
||||
// state->m_rdCost[state_id] = decisions->rdCost[decision_id];
|
||||
if (decisions->prevId[decision_id] > -2) {
|
||||
if (decisions->prevId[decision_id] >= 0) {
|
||||
const int prvState = ctxs->m_prev_state_offset + decisions->prevId[decision_id];
|
||||
|
@ -1784,7 +1819,8 @@ static INLINE void updateState(
|
|||
decisions->absLevel[decision_id] < 2 ? (unsigned)decisions->absLevel[decision_id] : 3);
|
||||
memset(state->m_absLevelsAndCtxInit[state_id], 0, 48 * sizeof(uint8_t));
|
||||
}
|
||||
|
||||
state->all_gte_four &= state->m_remRegBins[state_id] >= 4;
|
||||
state->all_lt_four &= state->m_remRegBins[state_id] < 4;
|
||||
uint8_t* levels = (uint8_t*)(state->m_absLevelsAndCtxInit[state_id]);
|
||||
levels[scan_pos & 15] = (uint8_t)MIN(255, decisions->absLevel[decision_id]);
|
||||
|
||||
|
@ -1860,6 +1896,10 @@ static INLINE void updateState(
|
|||
state->m_goRiceZero[state_id] = ((state_id & 3) < 2 ? 1 : 2) << state->m_goRicePar[state_id];
|
||||
}
|
||||
}
|
||||
else {
|
||||
state->all_gte_four &= state->m_remRegBins[state_id] >= 4;
|
||||
state->all_lt_four &= state->m_remRegBins[state_id] < 4;
|
||||
}
|
||||
}
|
||||
|
||||
static bool same[13];
|
||||
|
@ -1947,17 +1987,6 @@ int uvg_dep_quant(
|
|||
cur_tu->lfnst_idx :
|
||||
cur_tu->cr_lfnst_idx;
|
||||
|
||||
int8_t t[4] = {2, 2, 2, 2};
|
||||
__m128i pq_abs_a = _mm_set_epi32(16, 0, 16, 0);
|
||||
__m128i go_rice_zero = _mm_cvtepi8_epi32(_mm_loadu_epi8(t));
|
||||
__m128i cmp = _mm_cmplt_epi32(go_rice_zero, pq_abs_a);
|
||||
|
||||
__m128i max_rice = _mm_set1_epi32(15);
|
||||
__m128i go_rice_smaller = _mm_min_epi32(pq_abs_a, max_rice);
|
||||
|
||||
__m128i other = _mm_sub_epi32(pq_abs_a, _mm_set1_epi32(1));
|
||||
__m128i selected = _mm_blendv_epi8(go_rice_zero, other, cmp);
|
||||
|
||||
const int numCoeff = width * height;
|
||||
|
||||
memset(coeff_out, 0x00, width * height * sizeof(coeff_t));
|
||||
|
@ -2055,9 +2084,11 @@ int uvg_dep_quant(
|
|||
|
||||
dep_quant_context.m_allStates.effHeight = effectHeight;
|
||||
dep_quant_context.m_allStates.effWidth = effectWidth;
|
||||
dep_quant_context.m_allStates.all_gte_four = true;
|
||||
dep_quant_context.m_allStates.all_lt_four = false;
|
||||
dep_quant_context.m_allStates.m_commonCtx = &dep_quant_context.m_common_context;
|
||||
for (int i = 0; i < (compID == COLOR_Y ? 21 : 11); ++i) {
|
||||
dep_quant_context.m_allStates.m_gtxFracBitsArray[i] = rate_estimator.m_gtxFracBits[i];
|
||||
memcpy(dep_quant_context.m_allStates.m_gtxFracBitsArray[i], rate_estimator.m_gtxFracBits[i], sizeof(int32_t) * 6);
|
||||
}
|
||||
|
||||
depquant_state_init(&dep_quant_context.m_startState, rate_estimator.m_sigFracBits[0][0], rate_estimator.m_gtxFracBits[0]);
|
||||
|
|
Loading…
Reference in a new issue