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Implement writing MRL bits to cabac.
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8fb5220b17
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9396940900
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@ -859,7 +859,7 @@ static void encode_intra_coding_unit(encoder_state_t * const state,
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int multi_ref_idx = cur_cu->intra.multi_ref_idx;
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bool enable_mrl = state->encoder_control->cfg.mrl;
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if (cur_cu->type == 1/*intra*/ && (y % LCU_WIDTH) != 0 && !cur_cu->bdpcmMode && enable_mrl) {
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if (cur_cu->type == CU_INTRA && (y % LCU_WIDTH) != 0 && !cur_cu->bdpcmMode && enable_mrl) {
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if (MAX_REF_LINE_IDX > 1) {
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cabac->cur_ctx = &(cabac->ctx.multi_ref_line[0]);
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CABAC_BIN(cabac, multi_ref_idx != 0, "multi_ref_line");
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@ -930,7 +930,7 @@ static void encode_intra_coding_unit(encoder_state_t * const state,
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}
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// Is the mode in the MPM array or not
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flag[j] = (mpm_preds[j] == -1) ? 0 : 1;
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if (true||!(cur_pu->intra.multi_ref_idx || (isp_mode))) {
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if (!(cur_pu->intra.multi_ref_idx || (isp_mode))) {
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CABAC_BIN(cabac, flag[j], "prev_intra_luma_pred_flag");
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}
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}
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@ -661,7 +661,13 @@ static void encoder_state_write_bitstream_seq_parameter_set(bitstream_t* stream,
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WRITE_UE(stream, encoder->cfg.log2_parallel_merge_level-2, "log2_parallel_merge_level_minus2");
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WRITE_U(stream, 0, 1, "sps_isp_enabled_flag");
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if (state->encoder_control->cfg.mrl) {
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WRITE_U(stream, 1, 1, "sps_mrl_enabled_flag");
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} else {
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WRITE_U(stream, 0, 1, "sps_mrl_enabled_flag");
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}
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WRITE_U(stream, 0, 1, "sps_mip_enabled_flag");
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// if(!no_cclm_constraint_flag)
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if(encoder->chroma_format != KVZ_CSP_400) {
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