mirror of
https://github.com/ultravideo/uvg266.git
synced 2024-11-27 11:24:05 +00:00
Added AVX strategy
This commit is contained in:
Ari Lemmetti
parent
ab3845c9c7
commit
bdef5384ef
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@ -120,6 +120,9 @@
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<ClCompile Include="..\..\src\strategies\strategies-picture.c">
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<Filter>Source Files\strategies</Filter>
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</ClCompile>
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<ClCompile Include="..\..\src\strategies\picture\picture-avx.c">
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<Filter>Source Files\strategies\picture</Filter>
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</ClCompile>
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</ItemGroup>
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<ItemGroup>
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<ClInclude Include="..\..\src\global.h">
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@ -236,10 +239,19 @@
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<ClInclude Include="..\..\src\strategies\nal\nal-generic.c">
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<Filter>Source Files\strategies\nal</Filter>
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</ClInclude>
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<ClInclude Include="..\..\src\x86\picture_x86.h">
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<Filter>Header Files\x86</Filter>
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</ClInclude>
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</ItemGroup>
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<ItemGroup>
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<YASM Include="..\..\src\x86\cpu.asm">
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<Filter>Source Files\x86</Filter>
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</YASM>
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<YASM Include="..\..\src\x86\picture_x86.asm">
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<Filter>Source Files\x86</Filter>
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</YASM>
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<YASM Include="..\..\src\x86\x86inc.asm">
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<Filter>Source Files\x86</Filter>
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</YASM>
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</ItemGroup>
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</Project>
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152
src/strategies/picture/picture-avx.c
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152
src/strategies/picture/picture-avx.c
Normal file
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@ -0,0 +1,152 @@
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/*****************************************************************************
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* This file is part of Kvazaar HEVC encoder.
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*
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* Copyright (C) 2013-2014 Tampere University of Technology and others (see
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* COPYING file).
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*
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* Kvazaar is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Kvazaar is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with Kvazaar. If not, see <http://www.gnu.org/licenses/>.
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****************************************************************************/
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/*
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* \file
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*/
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#include "../strategyselector.h"
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//#include "../picture.h"
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#include "../x86/picture_x86.h"
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#include <math.h>
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#ifdef __GNUC__
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__attribute__((__target__("avx")))
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#endif
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static unsigned kvz_sad_32x32(const pixel *data1, const pixel *data2)
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{
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unsigned sad = 0;
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sad += kvz_sad_16x16(data1, data2);
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sad += kvz_sad_16x16(data1 + 8 * 32, data2 + 8 * 32);
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sad += kvz_sad_16x16(data1 + 16 * 32, data2 + 16 * 32);
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sad += kvz_sad_16x16(data1 + 24 * 32, data2 + 24 * 32);
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return sad;
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}
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static unsigned kvz_sad_32x32_stride(const pixel *data1, const pixel *data2, unsigned stride)
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{
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unsigned sad = 0;
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sad += kvz_sad_16x16_stride(data1, data2, stride);
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sad += kvz_sad_16x16_stride(data1 + 16, data2 + 16, stride);
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sad += kvz_sad_16x16_stride(data1 + 16 * stride, data2 + 16 * stride, stride);
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sad += kvz_sad_16x16_stride(data1 + 16 * stride + 16, data2 + 16 * stride + 16, stride);
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return sad;
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}
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static unsigned kvz_sad_64x64(const pixel *data1, const pixel *data2)
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{
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unsigned sad = 0;
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sad += kvz_sad_32x32(data1, data2);
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sad += kvz_sad_32x32(data1 + 16 * 64, data2 + 16 * 64);
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sad += kvz_sad_32x32(data1 + 32 * 64, data2 + 32 * 64);
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sad += kvz_sad_32x32(data1 + 48 * 64, data2 + 48 * 64);
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return sad;
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}
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static unsigned kvz_sad_64x64_stride(const pixel *data1, const pixel *data2, unsigned stride)
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{
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unsigned sad = 0;
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sad += kvz_sad_32x32_stride(data1, data2, stride);
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sad += kvz_sad_32x32_stride(data1 + 32, data2 + 32, stride);
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sad += kvz_sad_32x32_stride(data1 + 32 * stride, data2 + 32 * stride, stride);
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sad += kvz_sad_32x32_stride(data1 + 32 * stride + 32, data2 + 32 * stride + 32, stride);
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return sad;
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}
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static unsigned kvz_sad_generic(const pixel * const data1, const pixel * const data2,
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const int width, const int height, const unsigned stride1, const unsigned stride2)
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{
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int y, x;
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unsigned sad = 0;
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for (y = 0; y < height; ++y) {
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for (x = 0; x < width; ++x) {
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sad += abs(data1[y * stride1 + x] - data2[y * stride2 + x]);
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}
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}
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return sad;
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}
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static unsigned reg_sad_avx(const pixel * const data1, const pixel * const data2,
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const int width, const int height, const unsigned stride1, const unsigned stride2)
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{
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if (width == 4 && height == 4) {
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return kvz_sad_4x4_stride(data1, data2, stride1);
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} else if (width == 8 && height == 8) {
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return kvz_sad_8x8_stride(data1, data2, stride1);
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} else if (width == 16 && height == 16) {
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return kvz_sad_16x16_stride(data1, data2, stride1);
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} else if (width == 32 && height == 32) {
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return kvz_sad_32x32_stride(data1, data2, stride1);
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} else if (width == 64 && height == 64) {
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return kvz_sad_64x64_stride(data1, data2, stride1);
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} else {
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return kvz_sad_generic(data1, data2, width, height, stride1, stride2);
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}
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}
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// Function macro for defining hadamard calculating functions
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// for fixed size blocks. They calculate hadamard for integer
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// multiples of 8x8 with the 8x8 hadamard function.
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#define KVZ_SATD_NXN(n, pixel_type, suffix) \
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static unsigned kvz_satd_ ## suffix ## _ ## n ## x ## n ## _stride( \
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const pixel_type * const block1, const pixel_type * const block2) \
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{ \
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unsigned x, y; \
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unsigned sum = 0; \
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for (y = 0; y < (n); y += 8) { \
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unsigned row = y * (n); \
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for (x = 0; x < (n); x += 8) { \
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sum += kvz_satd_8x8_stride(&block1[row + x], (n), &block2[row + x], (n)); \
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} \
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} \
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return sum; \
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}
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// Declare these functions to make sure the signature of the macro matches.
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static cost_pixel_nxn_func kvz_satd_8bit_16x16;
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static cost_pixel_nxn_func kvz_satd_8bit_32x32;
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static cost_pixel_nxn_func kvz_satd_8bit_64x64;
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// These macros define sadt_16bit_NxN for N = 8, 16, 32, 64
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KVZ_SATD_NXN(16, pixel, 8bit)
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KVZ_SATD_NXN(32, pixel, 8bit)
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KVZ_SATD_NXN(64, pixel, 8bit)
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static int strategy_register_picture_avx(void* opaque) {
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bool success = true;
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success &= strategyselector_register(opaque, "reg_sad", "avx", 30, ®_sad_avx);
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success &= strategyselector_register(opaque, "sad_8bit_4x4", "avx", 30, &kvz_sad_4x4);
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success &= strategyselector_register(opaque, "sad_8bit_8x8", "avx", 30, &kvz_sad_8x8);
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success &= strategyselector_register(opaque, "sad_8bit_16x16", "avx", 30, &kvz_sad_16x16);
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success &= strategyselector_register(opaque, "sad_8bit_32x32", "avx", 30, &kvz_sad_32x32);
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success &= strategyselector_register(opaque, "sad_8bit_64x64", "avx", 30, &kvz_sad_64x64);
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success &= strategyselector_register(opaque, "satd_8bit_4x4", "avx", 30, &kvz_satd_4x4);
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success &= strategyselector_register(opaque, "satd_8bit_8x8", "avx", 30, &kvz_satd_8x8_stride);
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success &= strategyselector_register(opaque, "satd_8bit_16x16", "avx", 30, &kvz_satd_8bit_16x16_stride);
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success &= strategyselector_register(opaque, "satd_8bit_32x32", "avx", 30, &kvz_satd_8bit_32x32_stride);
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success &= strategyselector_register(opaque, "satd_8bit_64x64", "avx", 30, &kvz_satd_8bit_64x64_stride);
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return success;
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}
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620
src/x86/picture_x86.asm
Normal file
620
src/x86/picture_x86.asm
Normal file
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@ -0,0 +1,620 @@
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;/*****************************************************************************
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;* This file is part of Kvazaar HEVC encoder.
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;*
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;* Copyright (C) 2013-2014 Tampere University of Technology and others (see
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;* COPYING file).
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;*
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;* Kvazaar is free software: you can redistribute it and/or modify
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;* it under the terms of the GNU General Public License version 2 as published
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;* by the Free Software Foundation.
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;*
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;* Kvazaar is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;* GNU General Public License for more details.
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;*
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;* You should have received a copy of the GNU General Public License
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;* along with Kvazaar. If not, see <http://www.gnu.org/licenses/>.
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;****************************************************************************/
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%include "x86inc.asm"
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SECTION .text
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;KVZ_SAD_4X4
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;Calculates SAD of the 16 consequtive bytes in memory
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;r0 address of the first value(current)
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;r1 address of the first value(reference)
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cglobal sad_4x4, 2, 2, 2
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vmovdqu m0, [r0]
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vmovdqu m1, [r1]
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vpsadbw m0, m1
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vmovhlps m1, m0
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vpaddw m0, m1
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vmovd eax, m0
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RET
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;KVZ_SAD_4X4_STRIDE
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;Calculates SAD of a 4x4 block inside a frame with stride
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;r0 address of the first value(current)
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;r1 address of the first value(reference)
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;r2 stride
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cglobal sad_4x4_stride, 3, 3, 2
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vpinsrd m0, [r0], 0
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add r0, r2
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vpinsrd m0, [r0], 1
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vpinsrd m0, [r0+r2], 2
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vpinsrd m0, [r0+r2*2], 3
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vpinsrd m1, [r1], 0
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add r1, r2
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vpinsrd m1, [r1], 1
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vpinsrd m1, [r1+r2], 2
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vpinsrd m1, [r1+r2*2], 3
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vpsadbw m0, m1
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vmovhlps m1, m0
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vpaddw m0, m1
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vmovd eax, m0
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RET
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;KVZ_SAD_8X8
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;Calculates SAD of the 64 consequtive bytes in memory
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;r0 address of the first value(current)
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;r1 address of the first value(reference)
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cglobal sad_8x8, 2, 2, 5
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vpxor m0, m0
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%rep 2
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vmovdqu m1, [r0]
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vmovdqu m3, [r0+16]
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add r0, 32
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vmovdqu m2, [r1]
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vmovdqu m4, [r1+16]
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add r1, 32
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vpsadbw m1, m2
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vpsadbw m3, m4
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vpaddw m0, m1
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vpaddw m0, m3
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%endrep
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vmovhlps m1, m0
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vpaddw m0, m1
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vmovd eax, m0
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RET
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;KVZ_SAD_8X8_STRIDE
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;Calculates SAD of a 8x8 block inside a frame with stride
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;r0 address of the first value(current)
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;r1 address of the first value(reference)
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;r2 stride
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cglobal sad_8x8_stride, 3, 3, 5
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vpxor m0, m0
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vmovhpd m1, [r0]
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add r0, r2
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vmovlpd m1, [r0]
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vmovhpd m3, [r0+r2]
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vmovlpd m3, [r0+r2*2]
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lea r0, [r0+r2*2]
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add r0, r2
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vmovhpd m2, [r1]
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add r1, r2
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vmovlpd m2, [r1]
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vmovhpd m4, [r1+r2]
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vmovlpd m4, [r1+r2*2]
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lea r1, [r1+r2*2]
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add r1, r2
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vpsadbw m1, m2
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vpsadbw m3, m4
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vpaddw m0, m1
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vpaddw m0, m3
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vmovhpd m1, [r0]
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add r0, r2
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vmovlpd m1, [r0]
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vmovhpd m3, [r0+r2]
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vmovlpd m3, [r0+r2*2]
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lea r0, [r0+r2*2]
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add r0, r2
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vmovhpd m2, [r1]
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add r1, r2
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vmovlpd m2, [r1]
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vmovhpd m4, [r1+r2]
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vmovlpd m4, [r1+r2*2]
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lea r1, [r1+r2*2]
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add r1, r2
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vpsadbw m1, m2
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vpsadbw m3, m4
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vpaddw m0, m1
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vpaddw m0, m3
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vmovhlps m1, m0
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vpaddw m0, m1
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vmovd eax, m0
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RET
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;KVZ_SAD_16X16
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;Calculates SAD of the 256 consequtive bytes in memory
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;r0 address of the first value(current)
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;r1 address of the first value(reference)
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cglobal sad_16x16, 2, 2, 5
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vpxor m4, m4
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%rep 8
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; Load 2 rows from rec_buf to m0 and m2
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vmovdqu m0, [r0]
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vmovdqu m2, [r0 + 16]
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add r0, 32
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; Load 2 rows from ref_buf to m1 and m3
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vmovdqu m1, [r1]
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vmovdqu m3, [r1 + 16]
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add r1, 32
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vpsadbw m0, m1
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vpsadbw m2, m3
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vpaddw m4, m0
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vpaddw m4, m2
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%endrep
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vmovhlps m0, m4
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vpaddw m4, m0
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vmovd eax, m4
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RET
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;KVZ_SAD_16X16_STRIDE
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;Calculates SAD of a 16x16 block inside a frame with stride
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;r0 address of the first value(current)
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;r1 address of the first value(reference)
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;r2 stride
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cglobal sad_16x16_stride, 3, 3, 5
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vpxor m4, m4
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%rep 8
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; Load 2 rows from rec_buf to m0 and m2
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vmovdqu m0, [r0]
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vmovdqu m2, [r0 + r2]
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lea r0, [r0 + r2*2]
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; Load 2 rows from ref_buf to m1 and m3
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vmovdqu m1, [r1]
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vmovdqu m3, [r1 + r2]
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lea r1, [r1 + r2*2]
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vpsadbw m0, m1
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vpsadbw m2, m3
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vpaddw m4, m0
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vpaddw m4, m2
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%endrep
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vmovhlps m0, m4
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vpaddw m4, m0
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vmovd eax, m4
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RET
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;KVZ_SATD_4X4
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;Calculates SATD of the 16 consequtive bytes in memory
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;r0 address of the first value(current)
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;r1 address of the first value(reference)
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cglobal satd_4x4, 2, 2, 6
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vpmovzxbw m0, [r0]
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vpmovzxbw m2, [r1]
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vpsubw m0, m2
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vpmovzxbw m1, [r0+8]
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vpmovzxbw m3, [r1+8]
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vpsubw m1, m3
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;Horizontal phase
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;rows 1-2
|
||||
vphaddw m4, m0, m1
|
||||
vphsubw m5, m0, m1
|
||||
|
||||
vphaddw m0, m4, m5
|
||||
vphsubw m1, m4, m5
|
||||
|
||||
;Vertical phase
|
||||
vphaddw m4, m0, m1
|
||||
vphsubw m5, m0, m1
|
||||
|
||||
vphaddw m0, m4, m5
|
||||
vphsubw m1, m4, m5
|
||||
|
||||
vpabsw m0, m0
|
||||
vpabsw m1, m1
|
||||
|
||||
vpaddw m0, m1
|
||||
|
||||
vphaddw m0, m0
|
||||
vphaddw m0, m0
|
||||
vphaddw m0, m0
|
||||
|
||||
vpextrw eax, m0, 0
|
||||
|
||||
;Uncomment if transformed values not divided elsewhere
|
||||
;add eax, 1
|
||||
;shr eax, 1
|
||||
|
||||
RET
|
||||
|
||||
|
||||
;KVZ_SATD_8X8_STRIDE
|
||||
;Calculates SATD of a 8x8 block inside a frame with stride
|
||||
;r0 address of the first value(reference)
|
||||
;r1 address of the first value(current)
|
||||
;r2 stride
|
||||
|
||||
%if ARCH_X86_64
|
||||
cglobal satd_8x8_stride, 4, 4, 16
|
||||
%else
|
||||
cglobal satd_8x8_stride, 4, 4, 8
|
||||
%endif
|
||||
|
||||
vpmovzxbw m0, [r0]
|
||||
vpmovzxbw m7, [r2]
|
||||
vpsubw m0, m7
|
||||
|
||||
vpmovzxbw m1, [r0+r1]
|
||||
lea r0, [r0+r1*2]
|
||||
vpmovzxbw m7, [r2+r3]
|
||||
lea r2, [r2+r3*2]
|
||||
vpsubw m1, m7
|
||||
|
||||
vpmovzxbw m2, [r0]
|
||||
vpmovzxbw m7, [r2]
|
||||
vpsubw m2, m7
|
||||
|
||||
vpmovzxbw m3, [r0+r1]
|
||||
lea r0, [r0+r1*2]
|
||||
vpmovzxbw m7, [r2+r3]
|
||||
lea r2, [r2+r3*2]
|
||||
vpsubw m3, m7
|
||||
|
||||
vpmovzxbw m4, [r0]
|
||||
vpmovzxbw m7, [r2]
|
||||
vpsubw m4, m7
|
||||
|
||||
vpmovzxbw m5, [r0+r1]
|
||||
lea r0, [r0+r1*2]
|
||||
vpmovzxbw m7, [r2+r3]
|
||||
lea r2, [r2+r3*2]
|
||||
vpsubw m5, m7
|
||||
|
||||
vpmovzxbw m6, [r0]
|
||||
vpmovzxbw m7, [r2]
|
||||
vpsubw m6, m7
|
||||
|
||||
|
||||
%if ARCH_X86_64
|
||||
vpmovzxbw m7, [r0+r1]
|
||||
vpmovzxbw m8, [r2+r3]
|
||||
vpsubw m7, m8
|
||||
%elif
|
||||
vpmovzxbw m7, [r2+r3]
|
||||
movdqu [esp-16], m7
|
||||
vpmovzxbw m7, [r0+r1]
|
||||
vpsubw m7, [esp-16]
|
||||
|
||||
movdqu [esp-16], m4
|
||||
movdqu [esp-16*2], m5
|
||||
movdqu [esp-16*3], m6
|
||||
movdqu [esp-16*4], m7
|
||||
lea esp, [esp-16*4]
|
||||
%endif
|
||||
|
||||
;Horizontal phaze
|
||||
|
||||
%if ARCH_X86_64
|
||||
vphaddw m8, m0, m1
|
||||
vphsubw m9, m0, m1
|
||||
|
||||
vphaddw m10, m2, m3
|
||||
vphsubw m11, m2, m3
|
||||
|
||||
vphaddw m12, m4, m5
|
||||
vphsubw m13, m4, m5
|
||||
|
||||
vphaddw m14, m6, m7
|
||||
vphsubw m15, m6, m7
|
||||
|
||||
|
||||
vphaddw m0, m8, m9
|
||||
vphsubw m1, m8, m9
|
||||
|
||||
vphaddw m2, m10, m11
|
||||
vphsubw m3, m10, m11
|
||||
|
||||
vphaddw m4, m12, m13
|
||||
vphsubw m5, m12, m13
|
||||
|
||||
vphaddw m6, m14, m15
|
||||
vphsubw m7, m14, m15
|
||||
|
||||
|
||||
vphaddw m8, m0, m1
|
||||
vphsubw m9, m0, m1
|
||||
|
||||
vphaddw m10, m2, m3
|
||||
vphsubw m11, m2, m3
|
||||
|
||||
vphaddw m12, m4, m5
|
||||
vphsubw m13, m4, m5
|
||||
|
||||
vphaddw m14, m6, m7
|
||||
vphsubw m15, m6, m7
|
||||
|
||||
%elif
|
||||
|
||||
vphaddw m4, m0, m1
|
||||
vphsubw m5, m0, m1
|
||||
|
||||
vphaddw m6, m2, m3
|
||||
vphsubw m7, m2, m3
|
||||
|
||||
|
||||
vphaddw m0, m4, m5
|
||||
vphsubw m1, m4, m5
|
||||
|
||||
vphaddw m2, m6, m7
|
||||
vphsubw m3, m6, m7
|
||||
|
||||
|
||||
vphaddw m4, m0, m1
|
||||
vphsubw m5, m0, m1
|
||||
|
||||
vphaddw m6, m2, m3
|
||||
vphsubw m7, m2, m3
|
||||
|
||||
|
||||
movdqu m3, [esp]
|
||||
movdqu m2, [esp+16]
|
||||
movdqu m1, [esp+16*2]
|
||||
movdqu m0, [esp+16*3]
|
||||
|
||||
movdqu [esp], m7
|
||||
movdqu [esp+16*1], m6
|
||||
movdqu [esp+16*2], m5
|
||||
movdqu [esp+16*3], m4
|
||||
|
||||
vphaddw m4, m0, m1
|
||||
vphsubw m5, m0, m1
|
||||
|
||||
vphaddw m6, m2, m3
|
||||
vphsubw m7, m2, m3
|
||||
|
||||
|
||||
vphaddw m0, m4, m5
|
||||
vphsubw m1, m4, m5
|
||||
|
||||
vphaddw m2, m6, m7
|
||||
vphsubw m3, m6, m7
|
||||
|
||||
|
||||
vphaddw m4, m0, m1
|
||||
vphsubw m5, m0, m1
|
||||
|
||||
vphaddw m6, m2, m3
|
||||
vphsubw m7, m2, m3
|
||||
|
||||
%endif
|
||||
|
||||
|
||||
;Vertical phase
|
||||
|
||||
%if ARCH_X86_64
|
||||
|
||||
vphaddw m0, m8, m9
|
||||
vphsubw m1, m8, m9
|
||||
|
||||
vphaddw m2, m10, m11
|
||||
vphsubw m3, m10, m11
|
||||
|
||||
vphaddw m4, m12, m13
|
||||
vphsubw m5, m12, m13
|
||||
|
||||
vphaddw m6, m14, m15
|
||||
vphsubw m7, m14, m15
|
||||
|
||||
vpmovzxwd m0, m0
|
||||
vpmovzxwd m1, m1
|
||||
vpmovzxwd m2, m2
|
||||
vpmovzxwd m3, m3
|
||||
vpmovzxwd m4, m4
|
||||
vpmovzxwd m5, m5
|
||||
vpmovzxwd m6, m6
|
||||
vpmovzxwd m7, m7
|
||||
|
||||
vpaddd m8, m0, m2
|
||||
vpaddd m9, m1, m3
|
||||
vpsubd m10, m0, m2
|
||||
vpsubd m11, m1, m3
|
||||
|
||||
vpaddd m12, m4, m6
|
||||
vpaddd m13, m5, m7
|
||||
vpsubd m14, m4, m6
|
||||
vpsubd m15, m5, m7
|
||||
|
||||
vpaddd m0, m8, m12
|
||||
vpaddd m1, m9, m13
|
||||
vpaddd m2, m10, m14
|
||||
vpaddd m3, m11, m15
|
||||
|
||||
vpsubd m4, m8, m12
|
||||
vpsubd m5, m9, m13
|
||||
vpsubd m6, m10, m14
|
||||
vpsubd m7, m11, m15
|
||||
|
||||
%elif
|
||||
|
||||
vphaddw m0, m4, m5
|
||||
vphsubw m1, m4, m5
|
||||
|
||||
vphaddw m2, m6, m7
|
||||
vphsubw m3, m6, m7
|
||||
|
||||
vpmovzxwd m0, m0
|
||||
vpmovzxwd m1, m1
|
||||
vpmovzxwd m2, m2
|
||||
vpmovzxwd m3, m3
|
||||
|
||||
vpaddd m4, m0, m2
|
||||
vpaddd m5, m1, m3
|
||||
vpsubd m6, m0, m2
|
||||
vpsubd m7, m1, m3
|
||||
|
||||
movdqu m3, [esp]
|
||||
movdqu m2, [esp+16]
|
||||
movdqu m1, [esp+16*2]
|
||||
movdqu m0, [esp+16*3]
|
||||
|
||||
movdqu [esp], m7
|
||||
movdqu [esp+16*1], m6
|
||||
movdqu [esp+16*2], m5
|
||||
movdqu [esp+16*3], m4
|
||||
|
||||
vphaddw m0, m4, m5
|
||||
vphsubw m1, m4, m5
|
||||
|
||||
vphaddw m2, m6, m7
|
||||
vphsubw m3, m6, m7
|
||||
|
||||
vpmovzxwd m0, m0
|
||||
vpmovzxwd m1, m1
|
||||
vpmovzxwd m2, m2
|
||||
vpmovzxwd m3, m3
|
||||
|
||||
vpaddd m4, m0, m2
|
||||
vpaddd m5, m1, m3
|
||||
vpsubd m6, m0, m2
|
||||
vpsubd m7, m1, m3
|
||||
|
||||
vpaddd m4, m2, [esp-16]
|
||||
vpaddd m5, m3, [esp]
|
||||
vpsubd m6, m2, [esp-16]
|
||||
vpsubd m7, m3, [esp]
|
||||
|
||||
vpabsd m4, m4
|
||||
vpabsd m5, m5
|
||||
vpabsd m6, m6
|
||||
vpabsd m7, m7
|
||||
|
||||
vpaddd m2, m4, m5
|
||||
vpaddd m2, m6
|
||||
vpaddd m2, m7
|
||||
|
||||
vpaddd m4, m0, [esp-16*3]
|
||||
vpaddd m5, m1, [esp-16*2]
|
||||
vpsubd m6, m0, [esp-16*3]
|
||||
vpsubd m7, m1, [esp-16*2]
|
||||
|
||||
vpabsd m4, m4
|
||||
vpabsd m5, m5
|
||||
vpabsd m6, m6
|
||||
vpabsd m7, m7
|
||||
|
||||
vpaddd m0, m4, m5
|
||||
vpaddd m0, m6
|
||||
vpaddd m0, m7
|
||||
|
||||
vpaddd m0, m2
|
||||
|
||||
%endif
|
||||
|
||||
%if ARCH_X86_64
|
||||
vpabsd m0, m0
|
||||
vpabsd m1, m1
|
||||
vpabsd m2, m2
|
||||
vpabsd m3, m3
|
||||
vpabsd m4, m4
|
||||
vpabsd m5, m5
|
||||
vpabsd m6, m6
|
||||
vpabsd m7, m7
|
||||
|
||||
vpaddd m0, m1
|
||||
vpaddd m0, m2
|
||||
vpaddd m0, m3
|
||||
vpaddd m0, m4
|
||||
vpaddd m0, m5
|
||||
vpaddd m0, m6
|
||||
vpaddd m0, m7
|
||||
%endif
|
||||
|
||||
vphaddd m0, m0
|
||||
vphaddd m0, m0
|
||||
vpextrd eax, m0, 1
|
||||
vpinsrd m1, eax, 0
|
||||
vpaddd m0, m1
|
||||
vpextrd eax, m0, 1
|
||||
vpinsrd m1, eax, 0
|
||||
vpaddd m0, m1
|
||||
|
||||
%if ARCH_X86_64 == 0
|
||||
lea esp, [esp+16*4]
|
||||
%endif
|
||||
|
||||
vmovd eax, m0
|
||||
|
||||
;Uncomment if transformed values not divided elsewhere
|
||||
;add eax, 2
|
||||
;shr eax, 2
|
||||
|
||||
RET
|
||||
39
src/x86/picture_x86.h
Normal file
39
src/x86/picture_x86.h
Normal file
|
|
@ -0,0 +1,39 @@
|
|||
#ifndef _PICTURE_X86_H_
|
||||
#define _PICTURE_X86_H_
|
||||
/*****************************************************************************
|
||||
* This file is part of Kvazaar HEVC encoder.
|
||||
*
|
||||
* Copyright (C) 2013-2014 Tampere University of Technology and others (see
|
||||
* COPYING file).
|
||||
*
|
||||
* Kvazaar is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as published
|
||||
* by the Free Software Foundation.
|
||||
*
|
||||
* Kvazaar is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with Kvazaar. If not, see <http://www.gnu.org/licenses/>.
|
||||
****************************************************************************/
|
||||
|
||||
/*! \file picture_x86.h
|
||||
\brief assembly functions header for sad and satd
|
||||
*/
|
||||
|
||||
unsigned kvz_sad_4x4(const pixel*, const pixel*);
|
||||
unsigned kvz_sad_8x8(const pixel*, const pixel*);
|
||||
unsigned kvz_sad_16x16(const pixel*, const pixel*);
|
||||
|
||||
unsigned kvz_sad_4x4_stride(const pixel *data1, const pixel *data2, unsigned stride);
|
||||
unsigned kvz_sad_8x8_stride(const pixel *data1, const pixel *data2, unsigned stride);
|
||||
unsigned kvz_sad_16x16_stride(const pixel *data1, const pixel *data2, unsigned stride);
|
||||
|
||||
unsigned kvz_satd_4x4(const pixel *org, const pixel *cur);
|
||||
unsigned kvz_satd_8x8(const pixel *org, const pixel *cur);
|
||||
|
||||
unsigned kvz_satd_8x8_stride(const pixel *org, int32_t org_stride, const pixel *cur, int32_t cur_stride);
|
||||
|
||||
#endif
|
||||
Loading…
Reference in a new issue