Marko Viitanen
2d0348aa6d
New context models
2019-03-20 09:06:57 +02:00
Marko Viitanen
052080747e
New CABAC functions
2019-03-20 09:06:26 +02:00
Marko Viitanen
20667fdba6
Update header bits to VTM 4.0+
2019-03-11 14:02:12 +02:00
Pauli Oikkonen
6d43759604
Create a border-respecting 32-wide AVX hor_sad
2019-03-07 18:01:22 +02:00
Pauli Oikkonen
f218cecb38
Remove offending hor_sad_avx2_w32 function
...
Consider possibly creating a non-offending AVX2 version instead, the
way hor_sad_sse41_w32 works. Or maybe there's more essential work to
do.
2019-03-05 22:51:41 +02:00
Pauli Oikkonen
df2e6c54fd
4-unroll hor_sad_sse41_arbitrary
...
This may not increase perf though because it's so rarely used
function, so keeping icache footprint may be more essential...
2019-03-05 22:45:23 +02:00
Pauli Oikkonen
448eacba7b
Avoid overreading block borders in hor_sad_sse41_arbitrary
2019-03-05 22:34:50 +02:00
Eemeli Kallio
c159e275b7
Merge branch 'max_merge'
2019-03-05 14:39:03 +02:00
Pauli Oikkonen
41f51c08c4
Avoid overrunning buffer in hor_sad_sse41_w32
2019-03-01 15:37:38 +02:00
Pauli Oikkonen
bcd9879359
Include quant coeff range check in non-scaling list execution path too
2019-02-27 17:26:44 +02:00
Pauli Oikkonen
24e6363f64
Remove the kvz_quant_avx2 wrapper function
2019-02-27 16:32:58 +02:00
Pauli Oikkonen
748820f3c5
Eliminate unnecessary loading of coeffs if scaling lists are off
2019-02-27 16:26:35 +02:00
Pauli Oikkonen
5994350f40
Allow quant_flat_avx2 to be used with scaling lists on
2019-02-27 16:25:59 +02:00
Eemeli Kallio
7f4e0acf41
Added check if max-merge is out of bounds
2019-02-19 13:53:42 +02:00
Pauli Oikkonen
9b0e079262
Use SSE instructions for 64-bit SADs instead of MMX
...
VC++ seems to choke on MMX instructions
2019-02-18 20:13:33 +02:00
Pauli Oikkonen
d8b8923028
Add LGPL notices to reg_sad headers
2019-02-18 17:52:47 +02:00
Eemeli Kallio
2a40560888
some variables to const
2019-02-12 11:24:10 +02:00
Eemeli Kallio
8f8e7bb53c
Added possibility to reduce number of maximum number of merge candidates.
2019-02-12 09:21:03 +02:00
Marko Viitanen
1165219842
Update PTL, SPS ext and SPS flags to match VTM 4rc1
2019-02-07 10:00:04 +02:00
Pauli Oikkonen
770db825b9
Create hor_sad_w8 and w4 epol mask the way w16 works
2019-02-06 19:34:26 +02:00
Pauli Oikkonen
aa19bcac8a
Avoid branching in creating shuffle mask in hor_sad_w16
2019-02-06 18:58:46 +02:00
Pauli Oikkonen
2d05ca8520
Remove width from constant-width hor_sad func params
...
They should kinda know it already
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
57db234d95
Move 32-wide SSE4.1 hor_sad to picture-sse41.c
...
It's not used by picture-avx2.c that also includes the header, so
it should not be in the header
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
dd7d989a39
Implement 32-wide hor_sad on AVX2
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
ff70c8a5ec
Utilize horizontal SAD functions for SSE4.1 as well
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
f5ff4db01f
4-wide hor_sad border agnostic
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
35e7f9a700
Fix hor_sad w8 to work with both borders
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
836783dd6e
Use hor_sad_w32 for both left and right borders
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
69687c8d24
Modify hor_sad_sse41_w16 to work over left and right borders
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
51c2abe99a
Modify image_interpolated_sad to use kvz_hor_sad
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
1e0eb1af30
Add generic strategy for hor_sad'ing an non-split width block
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
686fb2c957
Unroll arbitrary-width SSE4.1 hor_sad by 4
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
768203a2de
First version of arbitrary-width SSE4.1 hor_sad
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
ccf683b9b6
Start work on left and right border aware hor_sad
...
Comes with 4, 8, 16 and 32 pixel wide implementations now, at some point
investigate if this can start to thrash icache
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
760bd0397d
Pad the image buffer by 64 bytes from both ends
...
This will be necessary for an efficient and straightforward
implementation of hor_sad for blocks over 16 pixels wide, because they
cannot use the shuffle trick because inter-lane shuffling is so hard to
do
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
c36482a11a
Fix bug in 24-wide SAD
...
*facepalm*
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
f781dc31f0
Create strategy for ver_sad
...
Easy to vectorize
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
ca94ae9529
Handle extrapolated blocks with unmodified width using optimized_sad pointer
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
91b30c7064
Tidy up kvz_image_calc_sad
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
9db0a1bcda
Create get_optimized_sad func for SSE4.1
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
91380729b1
Add generic get_optimized_sad implementation
...
NOTE: To force generic SAD implementation on devices supporting
vectorized variants, you now have to override both get_optimized_sad
and reg_sad to generic (only overriding get_optimized_sad on AVX2
hardware would just run all SAD blocks through reg_sad_avx2). Let's
see if there's a more sensible way to do it, but it's not trivial.
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
45f36645a6
Move choosing of tailored SAD function higher up the calling chain
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
91cb0fbd45
Create strategy for directly obtaining pointer to constant-width SAD function
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
94035be342
Unify unrolling naming conventions
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
517a4338f6
Unroll SSE SAD for 8-wide blocks to process 4 lines at once
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
0f665b28f6
Unroll arbitrary width SSE4.1 SAD by 4
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
cbca3347b5
Unroll 64-wide AVX2 SAD by 2
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
84cf771dea
Unroll 32 and 16 wide SAD vector implementations by 4
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
5df5c5f8a4
Cast all pointers to const types in vector SAD funcs
...
Also tidy up the pointer arithmetic
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
a711ce3df5
Inline fixed width vectorized SAD functions
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
6504145cce
Remove 16-pixel wide AVX2 SAD implementation
...
At least on Skylake, it's noticeably slower than the very simple
version using SSE4.1
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
4cb371184b
Add SSE4.1 strategy for 24px wide SAD and an AVX2 strategy for 16
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
796568d9cc
Add SSE4.1 strategies for SAD on widths 4 and 12 and AVX2 strategies for 32 and 64
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
4d45d828fa
Use constant-width SSE4.1 SAD funcs for AVX2
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
2eaa7bc9d2
Move SSE4.1 SAD functions to separate header
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
d2db0086e1
Create constant width SAD versions for 8 and 16 pixels
2019-02-04 20:41:40 +02:00
Pauli Oikkonen
a13fc51003
Include a blank AVX2 strategy registration function even in non-AVX2 builds
2019-02-04 19:52:24 +02:00
Pauli Oikkonen
d55414db66
Only build AVX2 coeff encoding when supported
...
..whoops
2019-02-04 19:34:30 +02:00
Pauli Oikkonen
3fe2f29456
Merge branch 'encode-coeffs-avx2'
2019-02-04 18:52:31 +02:00
Pauli Oikkonen
722b738888
Fix more naming issues
2019-02-04 16:05:43 +02:00
Pauli Oikkonen
e26d98fb75
Rename a couple variables and add crucial comments
2019-02-04 15:57:07 +02:00
Pauli Oikkonen
f186455619
Move encode_last_significant_xy out of strategy modules
...
It's the exact same in both AVX2 and generic, and does not seem to
be worth even trying to vectorize
2019-02-04 14:55:41 +02:00
Pauli Oikkonen
3f7340c932
Fine-tune pack_16x16b_to_16x2b
...
Avoid mm_set1 operation when it's possible to create the constant with
one bit-shift operation from another instead. Thanks Intel for
3-operand instruction encoding!
2019-02-04 14:44:47 +02:00
Pauli Oikkonen
314f5b0e1f
Rename 16x2b cmpgt function, comment it better, optimize it slightly
...
Eliminate an unnecessary bit masking to make it even more messy
2019-02-04 14:44:32 +02:00
Pauli Oikkonen
d8ff6a6459
Fix _andn_u32 to work on old Visual Studio
2019-02-01 15:34:42 +02:00
Pauli Oikkonen
26e1b2c783
Use (u)int32_t instead of (unsigned) int in reg_sad_sse41
2019-01-10 14:37:04 +02:00
Pauli Oikkonen
3a1f2eb752
Prefer SSE4.1 implementation of SAD over AVX2
...
It seems that the 128-bit wide version consistently outperforms the
256-bit one
2019-01-10 13:48:55 +02:00
Pauli Oikkonen
9b24d81c6a
Use SSE instead of AVX for small widths
...
Highly dubious if this will help performance at all
2019-01-07 20:12:13 +02:00
Pauli Oikkonen
b2176bf72a
Optimize SSE4.1 version of SAD
...
Make it use the same vblend trick as AVX2. Interestingly, on my test
setup this seems to be faster than the same code using 256-bit AVX
vectors.
2019-01-07 19:40:57 +02:00
Pauli Oikkonen
887d7700a8
Modify AVX2 SAD to mask data by byte granularity in AVX registers
...
Avoids using any SAD calculations narrower than 256 bits, and
simplifies the code. Also improves execution speed
2019-01-07 18:53:15 +02:00
Pauli Oikkonen
7585f79a71
AVX2-ize SAD calculation
...
Performance is no better than SSE though
2019-01-07 16:26:24 +02:00
Pauli Oikkonen
ab3dc58df6
Copy SAD SSE4.1 impl to AVX2
2019-01-03 18:31:57 +02:00
Pauli Oikkonen
45ac6e6d03
Tidy pack_16x16b_to_16x2b comments
2019-01-03 16:37:05 +02:00
Ari Lemmetti
cd818db724
Add missing quantization and residual in cost calculation (inter rd=2).
2018-12-21 15:55:29 +02:00
Pauli Oikkonen
016eb014ad
Move packing 16x16b -> 16x2b into separate function
2018-12-20 10:51:44 +02:00
Ari Lemmetti
b234897e8a
Fix smp and amp blocks in fme and revert previous change.
...
Filter 8x8 (sub)blocks even with 8x4, 4x8, 16x4, 4x16 etc.
Calculate SATD on the 8x4, ... part
2018-12-19 21:30:53 +02:00
Pauli Oikkonen
9aaa6f260d
Fixes to enable portability
2018-12-18 20:42:09 +02:00
Pauli Oikkonen
2fdbbe9730
Move CG reordering code from quant-avx2 to shared header
2018-12-18 19:42:18 +02:00
Pauli Oikkonen
d02207306d
Create a header file for shared AVX2 code
2018-12-18 19:41:09 +02:00
Pauli Oikkonen
361bf0c7db
Precompute >=2 coeff encoding loop with 2-bit arithmetic
...
Who needs 16x16b vectors when you can do practically the same with
16x2b pseudovectors in 32-bit general purpose registers!
2018-12-18 19:41:09 +02:00
Pauli Oikkonen
940b0e9e6a
Require BMI2 for AVX2 build
...
Any processor implementing AVX2 should also implement BMI2
2018-12-18 19:41:09 +02:00
Pauli Oikkonen
f66cb23d5b
Optimize greater1 encoding loop
...
Calculating the c1 variable need not be a serial operation!
2018-12-18 19:41:09 +02:00
Pauli Oikkonen
8c8b791c35
Vectorize kvz_context_get_sig_ctx_inc
2018-12-18 19:41:09 +02:00
Pauli Oikkonen
033261eb74
Eliminate two branches using bit magic
2018-12-18 19:41:09 +02:00
Pauli Oikkonen
c4434e8d04
Scan CG's in forward order to simplify finding last significant
2018-12-18 19:41:09 +02:00
Pauli Oikkonen
efd097f5a5
Vectorize the coeff group loop to some extent
2018-12-18 19:41:09 +02:00
Pauli Oikkonen
a01362e638
use the efficient method of reordering raster->scan
2018-12-18 19:41:09 +02:00
Pauli Oikkonen
50a888e789
Use the efficient method to find first and last nz coeffs in block
2018-12-18 19:41:09 +02:00
Pauli Oikkonen
7e9203f566
Scan coeff groups in scan order to help find last significant one
2018-12-18 19:41:09 +02:00
Pauli Oikkonen
9a5a6fdbc7
Simplify two ifs in encode_coeff_nxn-avx2
2018-12-18 19:41:09 +02:00
Pauli Oikkonen
37a2a8bac8
See if loop can be optimized by rearranging
2018-12-18 19:41:09 +02:00
Pauli Oikkonen
584f2f74b6
Vectorize significant coeff group scanning loop
2018-12-18 19:41:09 +02:00
Pauli Oikkonen
1bfed73221
Add AVX2 strategy for encode_coding_tree
2018-12-18 19:41:09 +02:00
Pauli Oikkonen
c3a6f3112a
Add generic strategy group for encode_coding_tree
2018-12-18 19:41:09 +02:00
Marko Viitanen
1ef851ab4b
Disable FME on amp/smp blocks with width or height not divisible by 8
2018-12-18 10:28:21 +02:00
Joose Sainio
b71c5573f0
Merge branch 'rate_control_fix'
2018-12-17 12:39:27 +02:00
Sergei Trofimovich
68a70e45a1
x86 asm: mark stack as non-executable
...
Gentoo's `scanelf` QA tool detects writable/executable stack
of assembly-writtent files as:
```
$ scanelf -qRa .
0644 LE !WX --- --- ./src/strategies/x86_asm/.libs/picture-x86-asm-sad.o
0644 LE !WX --- --- ./src/strategies/x86_asm/.libs/picture-x86-asm-satd.o
0644 LE !WX --- --- ./src/strategies/x86_asm/picture-x86-asm-sad.o
0644 LE !WX --- --- ./src/strategies/x86_asm/picture-x86-asm-satd.o
```
Normally C compiler emits non-executable stack marking (or GNU assembler
via `-Wa,--noexecstack`).
The change adds non-executable stack marking for yasm-based assmbly files.
https://wiki.gentoo.org/wiki/Hardened/GNU_stack_quickstart has more details.
Signed-off-by: Sergei Trofimovich <slyfox@gentoo.org>
2018-12-16 11:31:56 +00:00
Reima Hyvönen
1fcc5c6a8d
Merge branch 'bipred_recon'
2018-12-11 09:59:35 +02:00
Reima Hyvönen
e4a10880f3
Added case 12 to bipred_recon no mov
2018-12-11 09:52:17 +02:00
Marko Viitanen
a4f3968e52
Fix Visual Studio errors by initializing some variables used in AVX2 signhiding
2018-12-11 09:33:26 +02:00
Ari Lemmetti
ac943147e3
Calculate satd cost for whole non-square blocks as well.
2018-12-10 17:04:29 +02:00
Pauli Oikkonen
c465578048
Add a descriptive comment to coefficient reordering
2018-12-03 15:36:32 +02:00
Pauli Oikkonen
f78bf2ebcb
Optimize q_coefs usage for indexed fetch
2018-12-03 15:36:32 +02:00
Pauli Oikkonen
d9591f1b49
Eliminate midway buffering of reordered coefs
...
TODO: For some mysterious reason seems slightly slower than the
buffered one
2018-12-03 15:36:32 +02:00
Pauli Oikkonen
7fe454c51f
Optimize get_cheapest_alternative()
2018-12-03 15:36:32 +02:00
Pauli Oikkonen
6bbd3e5a44
Optimize rearrange_512 function
2018-12-03 15:36:32 +02:00
Pauli Oikkonen
cb8209d1b3
Vectorize transform coefficient reordering loop
2018-12-03 15:36:32 +02:00
Pauli Oikkonen
7cf4c7ae5f
Rename "reduce" functions to hsum
...
That's what the functions fundamendally do anyway
2018-12-03 15:36:32 +02:00
Pauli Oikkonen
316cd8a846
Fix ALIGNED keyword and grow alignment to 64B
2018-12-03 15:36:32 +02:00
Pauli Oikkonen
1befc69a4c
Implement sign bit hiding in AVX2
2018-12-03 15:36:32 +02:00
Pauli Oikkonen
c5cd03497e
Require BMI and ABM instruction sets for AVX2 build
...
AVX2 support on a processor should always imply BMI and ABM support.
The lzcnt and tzcnt instructions have more suitable semantics in the
corner case that source word is 0, and allow us to even handle that
scenario without a branch. Apparently Visual Studio will already
include this support when building with AVX2 enabled, so only the
automake files need to be tweaked.
2018-12-03 15:36:32 +02:00
Reima Hyvönen
f8696b54a4
Updated bipred_recon_avx2 in avx2/picture-avx2.c. Now it detects blocks that can be not equal to 8 (ie. width = 12)
2018-11-20 17:09:19 +02:00
Marko Viitanen
a5a10a33c3
Enable --scaling-list parameter and add to the documentation
2018-11-19 10:47:30 +02:00
Reima Hyvönen
710ba288db
Chroma has some problems
2018-11-15 16:42:48 +02:00
Sami Ahovainio
8f98d4aac7
Added square search
2018-11-14 14:50:31 +02:00
Marko Viitanen
6871490dd5
Simplify get_mvd_coding_cost(), only include golomb coding
2018-11-14 14:33:31 +02:00
Ari Lemmetti
a832206bb6
Replace 32-bit incompatible instrinsics
2018-11-12 18:54:33 +02:00
Ari Lemmetti
5c774c4105
Rewrite most of FME and interpolation filters
...
Changes had to break a lot of stuff and were just squashed into this horrible code dump
2018-11-08 20:21:16 +02:00
Joose Sainio
1c8a1f24e2
Don't assume anything about bits spent
2018-11-07 16:03:38 +02:00
Joose Sainio
3471e2470d
Fix using uninitialized value for the first frame
2018-11-07 08:17:39 +02:00
Joose Sainio
d95ac11a3b
Fix rate_control for other LP-GOPS
2018-11-06 14:20:44 +02:00
Joose Sainio
67a6ba667e
Fix rate control for flat lp-gop
2018-11-06 09:38:17 +02:00
Reima Hyvönen
7406c33a42
Some more cleaning
2018-10-26 12:25:18 +03:00
Reima Hyvönen
4c71546b2e
Cleaned some coding
2018-10-26 12:19:44 +03:00
Reima Hyvönen
4fe3909e48
Switched luma to use 32bits size ints intstead of 16bit size
2018-10-24 18:24:46 +03:00
Marko Viitanen
465bc2cfee
[EMT] make functions static and prefix arrays with kvz_g
2018-10-18 10:54:33 +03:00
Marko Viitanen
b133e7de1e
VTM 2.2 changed -> remove high_precision_motion_vectors flag
2018-10-17 12:41:14 +03:00
Marko Viitanen
169febd1c4
[EMT] Simplify DCT8, DCT5, DST1 and DST7 definitions
2018-10-17 12:17:54 +03:00
Marko Viitanen
e015d7eb2b
Fix compiler warnings
2018-10-17 10:43:11 +03:00
Marko Viitanen
ad310c77d3
Added EMT transforms to the strategies
2018-10-17 08:56:49 +03:00
Eemeli Kallio
284e73839e
Calculating zero cost moved to its own function
2018-10-16 11:02:01 +03:00
Reima Hyvönen
381e786e10
Trying to find the bug in luma
2018-10-11 18:08:41 +03:00
Marko Viitanen
c589e5ed36
Fix closed-gop frame feed, the ordering was incorrect after the first GOP
2018-10-10 11:12:03 +03:00
Reima Hyvönen
2f5f81bac3
removed the non-optimated bipred function
2018-10-09 11:19:23 +03:00
Marko Viitanen
75dce4f3ce
Fix low-delay-gop usage with --no-open-gop
2018-10-04 15:16:02 +03:00
Marko Viitanen
de71b58f76
Change closed GOP structure to include an additional IDR between GOPs
2018-10-04 11:17:03 +03:00
Marko Viitanen
1e1a80e4a6
[TMVP] fix clamping of block offsets and clean up the code a bit
2018-10-03 12:34:48 +03:00
Reima Hyvönen
212a8e68fa
Modified to avoid memory overflow, still some bug inside luma
2018-10-02 20:23:32 +03:00
Marko Viitanen
954f07e3d7
Add --(no-)open-gop option
2018-10-02 10:05:32 +03:00
Marko Viitanen
027359c3c3
Implement TMVP duplicate checking as in VTM 2.1
2018-09-28 11:50:36 +03:00
Marko Viitanen
571a545416
Fix spatial merge candidate selection
2018-09-26 15:10:31 +03:00
Marko Viitanen
63760ca0cf
Use kvz_cabac_bins_verbose flag to control cabac debug printing
2018-09-26 12:01:23 +03:00
Marko Viitanen
7c37f456f9
Fix implicit Qt split for p-frames
2018-09-26 12:00:18 +03:00
Marko Viitanen
b6f2c66c73
Fixed intra Most Probable Mode (mpm) derivation to conform VTM 2.1
2018-09-21 10:33:54 +03:00
Sami Ahovainio
a2b2275d87
Fixed array sizes in search_intra_rough from 35 to 67
2018-09-18 11:49:15 +03:00
Sami Ahovainio
82fb80ab6e
Fixed couple of if-clauses which still used the old intra mode range.
2018-09-17 08:56:43 +03:00
Marko Viitanen
a437d4c508
Fixed intra chroma mode bitstream writing (chroma search not used)
2018-09-13 15:05:00 +03:00
Marko Viitanen
389aeebe07
Added 2x2 transform functions
2018-09-13 14:51:07 +03:00
Marko Viitanen
445c059b4a
Fix transforms for VTM 2.0, generated new transform matrices and added a shift by 2 for forward and inverse
2018-09-13 14:39:49 +03:00
Marko Viitanen
35fa8e9785
Fix kvz_intra_get_dir_luma_predictor -> Intra working
2018-09-13 12:32:17 +03:00
Marko Viitanen
f75b0b11c3
Simplify intra filtered ref pixel selection
2018-09-13 10:09:52 +03:00
Sami Ahovainio
4bb484a86a
Fixed if-clause at search_intra.c to use new wider range of intra modes
2018-09-13 09:58:48 +03:00
Marko Viitanen
82de0fbee7
Switch intra search to use the actual 67 modes
2018-09-13 09:43:45 +03:00
Marko Viitanen
382917bcd3
New table for choosing angular intra filtered references and a small bugfix on the end condition of angular intra
2018-09-13 09:35:55 +03:00
Marko Viitanen
4aad2fa383
Fix intra mode writing
2018-09-12 10:34:58 +03:00
Marko Viitanen
d4ed0ee3ad
Fixed some array offsets in intra angular prediction
2018-09-12 08:53:17 +03:00
Marko Viitanen
20c96366ed
fix kvz_context_get_sig_ctx_idx_abs() parameter for "type" -> decoding with VVC
2018-09-10 12:51:02 +03:00
Marko Viitanen
a7ca09108c
Improve CABAC debugging by including similar info as in VTM
2018-09-10 11:00:00 +03:00
Sami Ahovainio
ce84407c69
Fixed coeff_remain writing to use the correct rice_param instead of using 0 all the time.
2018-09-07 11:24:24 +03:00
Sami Ahovainio
78ea24bcf1
Fixed sig_coeff_flag writing condition.
2018-09-06 15:48:45 +03:00
Marko Viitanen
4bebb4bb2c
Fix temp_diag and temp_sum initialization and coeff array usage in context derivation
2018-09-05 17:09:50 +03:00
Marko Viitanen
f5b6c386bc
Fix incorrect sig_flag implicity parameters and some temp variable initializations
2018-09-03 16:22:05 +03:00
Marko Viitanen
8bef85e056
Merge branch 'set-qp-in-cu'
2018-09-03 08:33:33 +03:00
Ari Lemmetti
2fdcc2b79d
Add option --set-qp-in-cu
2018-09-03 08:32:45 +03:00
Marko Viitanen
52be2f0bbe
Fixed kvz_encode_coeff_nxn and renamed some variables to match VTM
2018-08-31 15:10:17 +03:00
Sami Ahovainio
787264f568
Fixed dst indexing in kvz_angular_pred_generic
2018-08-31 10:36:28 +03:00
Sami Ahovainio
d2291fea83
Intra mode scaling moved from angular prediction to kvz_intra_predict. pdpc implemented in kvz_intra_predict.
2018-08-31 10:01:28 +03:00
Marko Viitanen
49a116ed3a
Bugfix correct array sizes for cu_ctx_last_x/y
2018-08-30 16:14:08 +03:00
Sami Ahovainio
84cef127dc
Fixed cu_gtx_flag_model_chroma initialization.
2018-08-30 15:21:16 +03:00
Marko Viitanen
7d491e639b
Add new values to last_x/y coding
2018-08-30 15:04:04 +03:00
Marko Viitanen
809805b185
Bugfixes for kvz_encode_coeff_nxn()
2018-08-30 14:50:29 +03:00
Marko Viitanen
0680f240d7
Converted kvz_encode_coeff_nxn and related helper functions to VVC K0072 format
2018-08-30 14:24:03 +03:00
Marko Viitanen
84e78c6c50
Disable writing of cabac flags not currently available
2018-08-30 11:21:44 +03:00
Marko Viitanen
e3dbaf99a9
Started implementing new coeff coding function
...
- added kvz_context_get_sig_ctx_idx_abs for abs sig context derivation
2018-08-30 11:09:42 +03:00
Marko Viitanen
e00319b832
Fix cu_sig_coeff_group_model init and some instances of cu_sig_model usage
2018-08-30 09:08:08 +03:00
Marko Viitanen
4429e0b89d
Expand cu_sig_coeff_group_model according to VVC
2018-08-29 16:20:34 +03:00
Sami Ahovainio
578122ed43
Context changes for chroma pred modes. BT flag init and chroma pred mode init moved inside a loop.
2018-08-29 16:00:08 +03:00
Sami Ahovainio
54ebadfc43
Clarifying comments and changes towards WAIP
2018-08-29 16:00:08 +03:00
Marko Viitanen
7f119e8bdd
Added new ctx models for sig, parity and gtx, removed models for one and abs
2018-08-29 15:57:40 +03:00
Marko Viitanen
46d02c1734
Implemented JVET-K0072 based cbf context selections
2018-08-29 10:12:07 +03:00
Marko Viitanen
bb9dc22336
Disable PCM
2018-08-29 09:59:53 +03:00
Marko Viitanen
23a1292f52
Added max_binary_tree_unit_size and more comments
2018-08-29 08:23:41 +03:00
Marko Viitanen
37caa451c6
Fix VVC split flag condition for hor and ver splits at the edges
...
- Split flag is no longer implicit when the block can be split with the BT after QT in horizontal or vertical way
2018-08-28 16:03:02 +03:00
Reima Hyvönen
896034b7cf
Some renamed functions back
2018-08-28 15:31:10 +03:00
Reima Hyvönen
e8b5e6db4c
Did some merging
2018-08-28 15:26:27 +03:00
Reima Hyvönen
7de5c74434
Updated bipred_recon to work faster
2018-08-28 15:12:31 +03:00
Reima Hyvönen
47b357cca2
Comment one test
2018-08-27 18:52:14 +03:00
Reima Hyvönen
2ca99a44e8
Updated shuffle operation to be in right order
2018-08-27 18:16:38 +03:00
Sami Ahovainio
42741a2c40
Some changes for PCM and Intra towards VTM 2.0 compatibility.
2018-08-27 09:18:15 +03:00
Marko Viitanen
3dc5f65fba
Add an extra bit to intra mode and map 33 angular modes to 65
2018-08-17 15:09:48 +03:00
Marko Viitanen
9aaf53fcd7
Add dep_quant_enable_flag to slice header
2018-08-17 14:58:57 +03:00
Marko Viitanen
dc92fa6fb3
Added missing ALF flag to SPS
2018-08-17 12:53:27 +03:00
Marko Viitanen
dbc74c592d
Add VTM 2.0 new flags to SPS
2018-08-17 12:47:29 +03:00
Marko Viitanen
17505c8306
Disable vertical and horizontal scan order with small blocks
...
- Intra now working down to 8x8 luma
2018-08-17 11:38:40 +03:00
Marko Viitanen
4f7da86285
Commented out sign hiding code, which is not used in VVC
2018-08-17 09:38:11 +03:00
Marko Viitanen
c9cbdd5dc3
Added couple of ToDo comments for large CTU support
2018-08-17 09:37:14 +03:00
Marko Viitanen
daf041406f
Disable DST
2018-08-16 16:05:32 +03:00
Marko Viitanen
b85ae3688e
Signal QP in slice header if tiles and slices=tiles are enabled
...
Keeps the PPS constant for various purposes
2018-08-16 08:44:39 +03:00
Sami Ahovainio
5baab86597
Added BT split flags
2018-08-14 15:28:06 +03:00
Marko Viitanen
b33aa37484
Enable max_trans_hier_depth values and disable DC and angular filtering
2018-08-14 15:24:21 +03:00