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Author SHA1 Message Date
Marko Viitanen 84e78c6c50 Disable writing of cabac flags not currently available 2018-08-30 11:21:44 +03:00
Marko Viitanen e3dbaf99a9 Started implementing new coeff coding function 
- added kvz_context_get_sig_ctx_idx_abs for abs sig context derivation
 2018-08-30 11:09:42 +03:00
Marko Viitanen e00319b832 Fix cu_sig_coeff_group_model init and some instances of cu_sig_model usage 2018-08-30 09:08:08 +03:00
Marko Viitanen 9eaef0044e Update project files for VS2017 2018-08-30 08:31:49 +03:00
Marko Viitanen 4429e0b89d Expand cu_sig_coeff_group_model according to VVC 2018-08-29 16:20:34 +03:00
Sami Ahovainio 578122ed43 Context changes for chroma pred modes. BT flag init and chroma pred mode init moved inside a loop. 2018-08-29 16:00:08 +03:00
Sami Ahovainio 54ebadfc43 Clarifying comments and changes towards WAIP 2018-08-29 16:00:08 +03:00
Marko Viitanen 7f119e8bdd Added new ctx models for sig, parity and gtx, removed models for one and abs 2018-08-29 15:57:40 +03:00
Marko Viitanen 46d02c1734 Implemented JVET-K0072 based cbf context selections 2018-08-29 10:12:07 +03:00
Marko Viitanen bb9dc22336 Disable PCM 2018-08-29 09:59:53 +03:00
Marko Viitanen 23a1292f52 Added max_binary_tree_unit_size and more comments 2018-08-29 08:23:41 +03:00
Marko Viitanen 37caa451c6 Fix VVC split flag condition for hor and ver splits at the edges 
- Split flag is no longer implicit when the block can be split with the BT after QT in horizontal or vertical way
 2018-08-28 16:03:02 +03:00
Sami Ahovainio 42741a2c40 Some changes for PCM and Intra towards VTM 2.0 compatibility. 2018-08-27 09:18:15 +03:00
Marko Viitanen 3dc5f65fba Add an extra bit to intra mode and map 33 angular modes to 65 2018-08-17 15:09:48 +03:00
Marko Viitanen 9aaf53fcd7 Add dep_quant_enable_flag to slice header 2018-08-17 14:58:57 +03:00
Marko Viitanen dc92fa6fb3 Added missing ALF flag to SPS 2018-08-17 12:53:27 +03:00
Marko Viitanen dbc74c592d Add VTM 2.0 new flags to SPS 2018-08-17 12:47:29 +03:00
Marko Viitanen 17505c8306 Disable vertical and horizontal scan order with small blocks 
- Intra now working down to 8x8 luma
 2018-08-17 11:38:40 +03:00
Marko Viitanen 4f7da86285 Commented out sign hiding code, which is not used in VVC 2018-08-17 09:38:11 +03:00
Marko Viitanen c9cbdd5dc3 Added couple of ToDo comments for large CTU support 2018-08-17 09:37:14 +03:00
Marko Viitanen daf041406f Disable DST 2018-08-16 16:05:32 +03:00
Sami Ahovainio 5baab86597 Added BT split flags 2018-08-14 15:28:06 +03:00
Marko Viitanen b33aa37484 Enable max_trans_hier_depth values and disable DC and angular filtering 2018-08-14 15:24:21 +03:00
Marko Viitanen 00a827007a Use normal split flags 2018-08-14 10:57:32 +03:00
Marko Viitanen 6a479f8249 Added debugging example to README 2018-07-27 14:44:15 +03:00
Marko Viitanen ffbc178cf9 An attempt to fix checksums 2018-07-27 14:38:05 +03:00
Marko Viitanen 84b6a61193 Hack to fix split flag model for PCM use -> valid VVC bitstream 2018-07-27 14:29:31 +03:00
Marko Viitanen 90174f1143 Add more values to cabac debugging 2018-07-27 13:59:54 +03:00
Marko Viitanen c6572d644f Updated split_flag initialization to support Large CTUs in VVC 2018-07-27 12:32:45 +03:00
Marko Viitanen 7abadaafe4 Disable CTU splitting and configure max CTU sizes to 64x64 2018-07-27 11:04:21 +03:00
Marko Viitanen 6921e31502 Fix debugging functions 2018-07-27 11:03:16 +03:00
Marko Viitanen 37b5ce3d33 Change configurations to ease VVC debugging, max-BT-depth = 0 2018-07-26 16:12:11 +03:00
Marko Viitanen 792da1b7e0 Force PCM coding and fix PCM sample output 2018-07-26 11:05:31 +03:00
Marko Viitanen 5d4a2a004f Remove depentent slice, wpp/tile and scaling list parameters from PPS 2018-07-26 10:43:21 +03:00
Marko Viitanen 31a6cbfe6d Disable sign bit hiding 2018-07-26 10:41:35 +03:00
Marko Viitanen 9f2b429c66 Disable some features not used in VVC 
- Part mode coding not used
 - split transform flag not used
 - last significant coeff pos swapping not used
 2018-07-26 10:33:27 +03:00
Marko Viitanen e84276f7f6 Fixed version string 2018-07-26 08:17:55 +03:00
Marko Viitanen e38109d102 Enable QTBT and set correct general_profile_idc for Next 2018-07-25 12:24:17 +03:00
Marko Viitanen 079ca9b8b2 Disable tile/wpp flags in slice header 2018-07-25 11:19:53 +03:00
Marko Viitanen b0ac7002e5 Disable VPS 2018-07-25 11:02:09 +03:00
Marko Viitanen c5bf6a3774 Bugfix: add missing parameters to WRITE_U 2018-07-25 10:18:48 +03:00
Marko Viitanen 9befe35961 Modify slice header to conform VVC 2018-07-25 10:17:42 +03:00
Marko Viitanen 95ce1e1a25 Modify parameter sets to conform VVC 2018-07-25 10:05:11 +03:00
Arttu Ylä-Outinen 9d22c1ec3e Merge branch 'coeff-cost-estimation' 2018-07-17 10:56:50 +03:00
Arttu Ylä-Outinen 83555c3d6d Enable --fast-residual-cost with fastest presets 2018-07-16 12:31:20 +03:00
Arttu Ylä-Outinen c438bb4a19 Add an option to skip CABAC for residual costs 
Adds command line option --fast-residual-cost=<limit>. When QP is below
the limit, estimates the cost of coding the residual coefficients from
the sum of absolute coefficients. Skipping CABAC is not worth it with
high QPs because there are fewer coefficients so CABAC is not as slow.
 2018-07-16 12:31:20 +03:00
Arttu Ylä-Outinen cbb5b20449 Merge branch 'gitlab-ci-fix' 2018-07-06 08:59:55 +03:00
Arttu Ylä-Outinen 31786a9266 Fix ASan test on Gitlab CI 
Changes test_external_symbols.sh to expect a failure with ASan.
 2018-07-05 16:05:55 +03:00
Arttu Ylä-Outinen b7474eb532 Fix SAO buffer sizes 
Increases sizes of buffers used for SAO reconstruction to avoid stack
buffer overflow in AVX2 SAO reconstruction.
 2018-07-05 15:56:30 +03:00
Arttu Ylä-Outinen 120f285eb7 Fix Gitlab CI tests 
Drops the build stage in Gitlab CI tests and includes build in the test
jobs. Building in a separate stage did not work as intended. The test
jobs rebuilt Kvazaar without the CFLAGS given in the build jobs and
overwrote the results from the build jobs. The test were therefore run
without the sanitizers enabled.
 2018-07-05 14:44:15 +03:00